Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Counting – scheduling – or event timing
Reexamination Certificate
1998-11-16
2001-07-17
Lee, Thomas (Department: 2182)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Counting, scheduling, or event timing
C713S500000, C377S052000
Reexamination Certificate
active
06263450
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to timers and more particularly to a multifunction microprocessor timer for timing intervals and producing and timing pulse width modulated digital signals.
BACKGROUND OF THE INVENTION
It is common in many microprocessor applications which require the performance of specific tasks at certain times to use processor timers to time such events. The generation of a square wave signal which is used for pulse width modulation (“PWM”) DC motor control is one example of where the timer is used. Processor timers are also used as interval or “watchdog” timers to keep track of the time elapsed since the occurrence of a certain event. After a predetermined time period has elapsed the watchdog timer notifies the processor so that appropriate action may be taken. A processor timer may also be used to generate periodic interrupts. This sort of timer function is useful in real time applications such as data sampling and communications.
Microprocessor timers of the prior art which have been used to produce repeated interrupts are typically counters which provide an interrupt when the counter overflows, or in the case of a countdown timer, when the counter reaches zero. In these types of timers, a countdown counter is typically loaded with a start value by the processor. The clock signal to the counter causes the counter to count down from its start value to zero. The larger the start value loaded into the counter, the longer the countdown period. When the counter counts down to zero, a zero comparator interrupts the processor. In order to begin timing the next interrupt the counter must be reloaded with a new start value. This requires the processor to execute a series of instructions in order to reload the counter and restart the timer, thereby adding an inherent delay to the timing interval and reducing the accuracy of the timer. The inherent delay cannot be factored into the countdown period because the delays are unpredictable due to variations in processor speed caused by congestion from the execution of other applications.
Microprocessor timers also often employ a “prescaler” in order to lengthen the timing period. The prescaler is usually a divide-by counter which increments the counter only after a given number of input clock ticks. Reading the prescaler could be a useful way of determining the number of cycles elapsed since the timer was finished so that the subsequent timing period may be adjusted accordingly. However, in the usual implementation of a clock and prescaler, the prescaler is cleared any time the timer is written to, so this useful information is lost.
Because of the above deficiencies, special dedicated timer hardware is often designed for specific applications so that the application does not have to rely on the inaccurate microprocessor timer. This need for special dedicated hardware can add to the cost and complexity of an application.
Timers are used in applications where it is desired to create or time pulse width modulated signals. PWM signals are used in communications, dc motor control and other applications. In dc motor control the duty cycle of the PWM signal controls the torque or speed of the motor. A timer can be used to generate a PWM signal having a specified duty cycle. A timer may also be used to measure the width of incoming PWM pulses. Timers of the prior art that have been used for PWM applications have exhibited the same deficiencies as are seen in interval timers of the prior art.
As can be seen from the above, a microprocessor timer capable of generating accurately timed interrupts, generating accurate PWM signals and accurately measuring PWM signals without the need for special dedicated application hardware is desirable.
SUMMARY OF THE INVENTION
According to a first broad aspect, the invention provides a programmable timer for use with a microprocessor, the timer having a counter connected to a databus of the microprocessor, the counter including a clock signal input for counting clock pulses and reset means for resetting the contents of the counter to a reset value. The timer also has a reset register connected to the microprocessor databus for receiving and storing a digital value from the microprocessor. The timer also has a first comparator for comparing the counter against the reset register and providing the result of the comparison at a first comparison output, the first comparison output being connected to the reset means in order to reset the counter when it reaches a count greater than or equal to the value stored in the reset register to thereby provide a periodic signal at the first comparison output.
The first comparison signal may be connected to an interrupt input of the microprocessor to thereby periodically interrupt the microprocessor with a period corresponding to the value stored in the reset register.
The programmable timer may also have a PWM register connected to the microprocessor databus for storing digital value corresponding to a duty cycle of a pulse width modulated signal, and a second comparator for comparing the PWM register and the counter and providing the results of the comparison at a second comparison output, thereby providing a pulse width modulated signal at a second comparison output having a period corresponding to the value stored in the reset register and a duty cycle corresponding to the valued stored in the PWM register.
The programmable timer may also have an AND gate with one input connected to a PWM signal source and one input connected to a clock source, and a multiplexer controllable by said microprocessor, the multiplexer having a first data channel connected to an output of the AND gate and a second data channel connected to the clock source, wherein the counter is operative to count the number of clock pulses corresponding to phase of the PWM signal source when the first multiplexer data channel is selected.
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Blake Cassels & Graydon LLP
Celestica North America Inc.
Du Thuan
Lee Thomas
LandOfFree
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