Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output process timing
Patent
1997-09-05
2000-05-02
Thai, Xuan M.
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output process timing
710 29, 710105, G06F 1342
Patent
active
060584408
ABSTRACT:
A method and device is provided for controlling access to a resource by a bus master over a bus coupling the bus master to the resource. The resource includes an intelligent component that controls the operation of the resource. A series of packets is transmitted over the bus between the bus master and the resource, at a transmission speed controlled by the bus master. A request/response logic in the resource controllably throttles transmissions of the packets at the resource, at specified time intervals. Each of the time intervals is set at a time period to assure sufficient time for the intelligent component to complete processing tasks contained in the packets.
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Bloch Peter
Cross Leonard W.
Oztaskin Ali S.
Intel Corporation
Thai Xuan M.
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