Program modification device

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

Reexamination Certificate

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Details

C711S221000, C717S168000, C714S006130

Reexamination Certificate

active

06715051

ABSTRACT:

TECHNICAL FIELD
The present invention relates to program modification, and more specifically, to program modification used in a computer system which executes programs fixed on instruction ROM and the like.
BACKGROUND ART
(General Background)
Conventional program modification devices include devices with a register for modification and devices containing indirect jump instructions in programs.
One such program modification device will be described as follows with reference to the drawings. (This device should be more strictly referred to as a program device provided with a function of modifying and executing programs fixed on ROM or the like; however, it is simply referred to as the program modification device).
FIG. 1
shows the entire structure of this conventional program modification device, and
FIG. 2
shows the details of its main part.
In
FIG. 1
the program modification device comprises a CPU core unit
1
including an execution unit
2
and an instruction acquisition unit
3
, an instruction ROM
4
which stores programs, a program monitor unit
5
which checks whether the program portion which is going to be executed is a program portion (program data) to be modified or not, and an acquired instruction switch unit
6
which switches between acquiring the instruction the instruction acquisition unit
3
is going to execute from the instruction ROM
4
or acquiring it from a modification target program storage memory A, which will be described later, based on the determination of the program monitor unit
4
.
The program modification device further comprises modifying address registers
7
which store the addresses of program data that need to be modified (hereinafter referred to as the modification source program data) and the addresses of program data that are modified and executed instead of the modification source program data (hereinafter referred to as the modification target program data) in pairs; a modification target program storage memory A
8
which stores modification target program data; an indirect call instruction row
9
contained in the instruction ROM
4
; an indirect call table
10
which is referred to by the indirect call instruction row
9
; and a modification target program storage memory B
11
which stores branch target program data branching in the indirect call table
10
(when there is no modification in a program, the branch target in the indirect call table
10
is in the ROM
4
).
It goes without saying that this program modification device may further comprise a CRT or a liquid crystal display device, a keyboard, clock signal generation means, CD-ROM readout means, and a code correction unit, depending on the use of the computer system equipped with the program modification device.
In terms of the object of the present invention, the modification target program storage memory A
8
and the modifying address registers
7
are dispensable unless the programs in the instruction ROM
4
or the CD-ROM but also a so-called address group consisting of consecutive addresses, a specific region on memory, and a specific one memory among plural memories.
The following is a continuation of the description of the conventional program modification device.
FIG. 2
(
1
) is a conceptual illustration showing the inside of the instruction ROM
4
.
FIG. 2
(
2
) is a conceptual illustration showing the inside of the modifying address registers
7
.
FIG. 2
(
3
) is a conceptual illustration showing the inside of the modification target program storage memory A
8
.
FIG. 2
(
4
) is a conceptual illustration showing the inside of the indirect call table
10
.
FIG. 2
(
5
) is a conceptual illustration of the modification target program storage memory B
11
.
The behavior of the program modification device will be described as follows.
Assume that addresses A
1
and A
2
in the instruction ROM
4
shown in
FIG. 2
(
1
) are the addresses of the modification source program data with errors, and the program data at addresses B
1
and B
2
shown in
FIG. 2
(
2
) are executed instead of the program data at these addresses A
1
and A
2
, respectively.
Also assume that the indirect call instruction row in the instruction ROM
4
shown in
FIG. 2
(
1
), which branches to the address a
1
in the instruction ROM
4
, is so modified as to branch to the address b
1
in the modification target program memory B
11
as shown in
FIG. 2
(
4
).
1) In order to execute the program data of the addresses B
1
and B
2
instead of the program data of the addresses A
1
and A
2
, the addresses A
1
and B
1
as a pair and the addresses A
2
and B
2
as another pair are written into the modifying address registers
7
as shown in
FIG. 2
(
2
). Furthermore, the indirect call table
10
shown in
FIG. 2
(
4
) is changed from the address a
1
which is before the modification to the address b
1
which is after the modification.
2) The instruction acquisition unit
3
sequentially acquires instructions from the instruction ROM
4
, and the execution unit
2
executes the instructions.
3) The program monitor unit
5
continuously checks whether or not the address of program data acquired by the instruction acquisition unit
3
agrees with the address of the modification source program data in the modifying address registers
7
by referring to the modifying address registers
7
.
4) When the instruction acquisition unit
3
tries to acquire program data from the address A
1
in the instruction ROM
4
, the program monitor unit
5
detects agreement between the address
1
and the address of the modification source program data which is written in the modifying address registers
7
. Then, the program monitor unit
5
makes the acquired instruction switch unit
6
acquire not the program data at the address A
1
but the program data at the address B
1
, which is stored with the address A
1
in a pair.
5) The acquired instruction switch unit
6
switches the instruction acquisition unit
3
so that the unit
3
acquires instructions not from the address A
1
in the instruction ROM
4
but from the address B
1
on the modification target program storage memory A
8
. As a result, the program data at the address A
1
in the instruction ROM
4
are modified into the program data at the address B
1
on the modification target program storage memory A
8
. In the same procedure, the program data at the address A
2
is modified into the program data at the address B
2
.
6) The instruction acquisition unit
3
acquires instructions from the indirect call instruction row on the instruction ROM
4
, and the execution unit
2
executes the instructions. If it is before the modification of the program (before the change of the indirect call table
10
), the indirect call table
10
is referred to so as to acquire instructions from the address a
1
.
In reality, the indirect call table
10
is changed from the address a
1
to the address b
1
, so that after the execution of the indirect call instruction, instructions are acquired from the address b
1
. This indicates that the program data at the address a
1
in the instruction ROM
4
have been modified into the program data on the modification target program storage memory B
11
.
In the above-mentioned procedure, inherently non-modifiable errors in the programs fixed on the instruction ROM or the like or found after the fabrication of ROM can be modified.
Of the modification target program storage memories A
8
and B
11
shown in
FIG. 1
, either one could be used, or they could be physically one.
As another conventional device,
FIG. 3
shows another system which is basically the same the above-mentioned conventional device. In
FIG. 3
a built-in ROM
41
corresponds to the instruction ROM
4
shown in
FIG. 1
, and a PC
1
and a decoder
2
correspond to the CPU core unit
1
shown in FIG.
1
. The acquired instruction switch unit
6
is a kind of selector. When the program monitor unit
5
receives the address of a modification source program, the acquired instruction switch unit
6
receives the corresponding modification targe

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