Program memory space expansion for particular processor...

Electrical computers and digital processing systems: memory – Address formation – Incrementing – decrementing – or shifting circuitry

Reexamination Certificate

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Details

C711S203000, C711S206000, C711S208000, C711S209000, C711S220000

Reexamination Certificate

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10898704

ABSTRACT:
A system efficiently expands program memory without extensively modifying the remaining microcontroller architecture. An address bus of N+M bits addresses 2Nmemory locations in a regular portion of program memory and additional memory locations in an expanded portion. An N-bit program counter increments through instructions stored only in the regular portion. Constants are stored in both the regular and expanded portions. An M-bit page-designator is prepended to an N-bit operand to generate a memory address of N+M bits. Program memory is expanded only when a load instruction retrieves constants from program memory. The page-designator is toggled when an N-bit operand rolls over upon incrementing by the load instruction. A block of constants straddling the boundary between the regular and expanded portions can be retrieved from program memory by executing only the load instruction. When program instructions are executed that do not retrieve constants, a fixed page-designator designates the regular portion.

REFERENCES:
patent: 6401196 (2002-06-01), Lee et al.
patent: 6643760 (2003-11-01), Troutman et al.
patent: 6691219 (2004-02-01), Ma et al.
patent: 6728856 (2004-04-01), Grosbach et al.
patent: 7007194 (2006-02-01), Wilson et al.
patent: 2002/0156991 (2002-10-01), Ma et al.

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