Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
Patent
1995-08-23
1999-05-11
An, Meng-Ai T.
Electrical computers and digital processing systems: memory
Address formation
Combining two or more values to create address
711200, 39580001, G06F9/32
Patent
active
059039183
ABSTRACT:
An apparatus and method of efficiently and dynamically generating the addresses associated with a set of instructions in a microprocessor pipeline is disclosed. Program counter age bits associated with the offsets of an address of a predetermined instruction within a set of instructions are used to indicate the chronological age of each instruction within the set of instructions. The age bits are generated by a logic circuit which also dispatches instructions to various execution units. The age bits are used to maintain and track the addresses of an instruction stream within a processing system so that there is no need to store the addresses of each and every instruction.
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Bauman James A.
Chang Paul
Kizhepat Govind
An Meng-Ai T.
Davis Jr. Walter D.
Sun Microsystems Inc.
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