Production worthy interconnect process for deep sub-half microme

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

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257751, 257763, 257767, 257915, H01L 2348, H01L 2352, H01L 2940

Patent

active

056867611

ABSTRACT:
The present invention is directed to improving the throughput of the process for fabricating multilayer interconnects. Tungsten plugs, formed in contact/via openings etched in an interlayer dielectric, have been widely used in industry to form interconnection between different metal layers. An adhesion layer comprising a Ti/TiN stack is typically employed to support the adhesion of the tungsten plug in the contact/via openings. The present invention is directed to a process involving the formation of a Ti/TiN landing pad at the base of contact/via openings prior to the deposition of the interlayer dielectric. The process of the present invention enables the removal of the Ti under-layer and the reduction of the TiN thickness in the Ti/TiN stack. The throughput of the process for fabricating multilayer interconnects is thus greatly improved while the integrity of the devices are maintained.

REFERENCES:
patent: 4926237 (1990-05-01), Sun et al.
patent: 5049975 (1991-09-01), Ajika et al.
patent: 5306952 (1994-04-01), Matsuuura et al.
patent: 5360995 (1994-11-01), Graas
patent: 5565708 (1996-10-01), Ohsaki et al.

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