Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-10-10
2006-10-10
Smith, Zandra V. (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S623000, C438S624000, C438S942000, C257SE21002
Reexamination Certificate
active
07119007
ABSTRACT:
The method includes forming on an underlayer wiring a first insulating film, a second insulating, and first mask forming layer; forming a first resist mask having an inverted pattern of wiring Wenches for the upper wiring; etching the first mask forming layer through the first resist mask, thereby forming in the first mask forming layer a concave part conforming to the inverted pattern of wiring tenches for the upper wiring, forming on the first mask forming layer a second mask forming layer, thereby filling the concave part with the second mask forming layer; selectively removing the second mask forming layer on the region in which the wiring trench is formed, thereby forming the second mask having the wiring trench pattern; forming on the first mask forming layer a second resist mask having an opening pattern of the via holes; etching the first mask forming layer and the second insulating film through the second resist mask, thereby forming the via holes.
REFERENCES:
patent: 6242339 (2001-06-01), Aoi
patent: 2001/0002331 (2001-05-01), Miyata
patent: 2002/0013046 (2002-01-01), Koganei
patent: 2004/0026364 (2004-02-01), Kihara
patent: 10-143914 (1998-05-01), None
patent: 2000-150519 (2000-05-01), None
patent: 2001-044189 (2001-02-01), None
patent: 2001-332619 (2001-11-01), None
International Search Report Sep. 24, 2003.
Kananen Ronald P.
Novacek Christy
Rader & Fishman & Grauer, PLLC
Smith Zandra V.
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