Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
2007-10-30
2007-10-30
Kindred, Alford (Department: 2181)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C710S001000, C370S412000, C370S429000
Reexamination Certificate
active
10675716
ABSTRACT:
A processor includes a plurality of input ports, memory circuitry for storing data blocks associated with protocol data units (PDUs) and received by the processor at the input ports, and controller circuitry coupled to the memory circuitry. The controller circuitry is operative to discard certain ones of the data blocks received at the input ports in an oversubscription condition in which the received data blocks exceed a designated capacity of the processor. A discarded data block indicator is generated for a given one of the input ports if a data block received at the given input port for a particular PDU is discarded. One or more additional data blocks received at the given input port for the particular PDU are discarded based at least in part on the discarded data block indicator. The oversubscription condition may thereby be overcome in a manner which advantageously minimizes the number of received PDUs that are corrupted through discarded data blocks.
REFERENCES:
patent: 5764641 (1998-06-01), Lin
patent: 6434115 (2002-08-01), Schwartz et al.
patent: 6874026 (2005-03-01), Maria et al.
patent: 2001/0048662 (2001-12-01), Suzuki et al.
patent: 2002/0176424 (2002-11-01), Knight et al.
patent: 2003/0172149 (2003-09-01), Edsall et al.
patent: 2003/0202481 (2003-10-01), Pillar et al.
IEEE Journal on selected areas in communications, vol. 13, No. 4 (May 1995), pp. 633-641. “Dynamics of TCP Traffic over ATM Networks” by Allyn Romanow and Sally Floyd.
U.S. Appl. No. 10/029,704, filed Dec. 21, 2001, M. Calle et al., “Processer with Packet Data Flushing Feature.”
IBM PowerNP™, NP4GS3, Network Processor, pp. 1-12, 35-38 and 140-150, Jan. 2003.
Agere Systems Inc.
Franklin Richard
Kindred Alford
LandOfFree
Processor with input data block discard mechanism for use in... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Processor with input data block discard mechanism for use in..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Processor with input data block discard mechanism for use in... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3902306