Processor with coherent bus controller at perpendicularly...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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C710S306000

Reexamination Certificate

active

07865650

ABSTRACT:
A symmetric multi-processing (SMP) processor includes a primary interconnect trunk for communication of information between multiple compute elements situated along the primary interconnect trunk. The processor also includes a secondary interconnected trunk that may be oriented perpendicular with respect to the primary interconnect trunk. The secondary interconnect trunk communicates information off-chip via a number of I/O interfaces at the perimeter of the processor chip. The I/O interfaces may be distributed uniformly along portions of the perimeter.

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