Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
2006-01-24
2006-01-24
Chaki, Kakali (Department: 2193)
Electrical computers and digital processing systems: processing
Processing control
Branching
C712S232000, C712S233000
Reexamination Certificate
active
06990570
ABSTRACT:
A processing engine, such as a digital signal processor, includes an execution mechanism, a repeat count register and a repeat count index register. The execution mechanism is operable for a repeat instruction to initialize the repeat count index register with the content of the repeat count register, and to modify the content of the repeat count register. The repeat instruction comprises two parts, the first of which initializes the repeat count index register and initiates repeat of a subsequent instruction, and the second part of which modifies the content of the repeat count register.
REFERENCES:
patent: 3665402 (1972-05-01), Greenspan et al.
patent: 4556938 (1985-12-01), Parker et al.
patent: 4652997 (1987-03-01), Kloker
patent: 4713749 (1987-12-01), Magar et al.
patent: 5056004 (1991-10-01), Ohde et al.
patent: 5101484 (1992-03-01), Kohn
patent: 5303355 (1994-04-01), Gergen et al.
patent: 5392437 (1995-02-01), Matter et al.
patent: 5452401 (1995-09-01), Lin
patent: 5515530 (1996-05-01), Eskandari
patent: 5579493 (1996-11-01), Kiuchi et al.
patent: 5596760 (1997-01-01), Ueda
patent: 5713028 (1998-01-01), Takahashi et al.
patent: 5732234 (1998-03-01), Vassiliadis et al.
patent: 5734880 (1998-03-01), Guttag et al.
patent: 5752015 (1998-05-01), Henry et al.
patent: 5784628 (1998-07-01), Reneris
patent: 5842028 (1998-11-01), Vajapey
patent: 5898866 (1999-04-01), Atkins et al.
patent: 5960210 (1999-09-01), Jin
patent: 5996078 (1999-11-01), Christensen et al.
patent: 6145076 (2000-11-01), Gabzdyl et al.
patent: 6282633 (2001-08-01), Killian et al.
patent: 6842895 (2005-01-01), Renard et al.
patent: 0 206 653 (1986-12-01), None
patent: 0 374 419 (1990-06-01), None
patent: 0848208 (1998-05-01), None
patent: WO 98/35301 (1998-08-01), None
Pentium Processor Family Developer's Manual, vol. 3: Architecture and Programming Manual herein referred to as intel; Intel Corporation; 1995; pp. 4-28 to 4-31 and 18-7.
“The Microarchitecture of Superscalar Processors”; Smith, James E. and Sohi, Gurindar S.; Proceedings of the IEEE. vol. 83, No. 12, Dec. 1995; pp. 1609-1624.
MC68030: Enhanced 32-Bit Microprocessor User's Manual Second Edition; Prentice Hall; 1989 Motorola; p. 2-8.
“TMS320 DSP Product Family Glossary”; Texas Instruments, 1998.
Uffenbeck, John; “Microcomputers and Microprocessors: The 8080, 8085, and Z-80 Programming, Interfacing, and Troubleshooting”; Prentice-Hall, Inc.; 1985; pp. 53-62 and 637-643.
Stallings, “Computer Organization and Architecture: Principles of Structure and Function”; Macmillan Publishing Company, 1987, pp. 288-289.
Boyadjian Alain
Laurenti Gilbert
Masse Yves
Brady III W. James
Chaki Kakali
Marshall, Jr. Robert D.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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