Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
2011-01-18
2011-01-18
Chan, Eddie P (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Branching
Reexamination Certificate
active
07873820
ABSTRACT:
The present invention provides processing systems, apparatuses, and methods that reduce power consumption with the use of a loop buffer. In an embodiment, an instruction fetch unit of a processor initially provides instructions from an instruction cache to an execution unit of the processor. While instructions are provided from the instruction cache to the execution unit, instructions forming a loop are stored in a loop buffer. When a loop stored in the loop buffer is being iterated, the instruction cache is disabled to reduce power consumption and instructions are provided to the execution unit from the loop buffer. When the loop is exited, the instruction cache is re-enabled and instructions are provided to the execution unit from the instruction cache.
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Chan Eddie P
Faherty Corey
MIPS Technologies Inc.
Sterne Kessler Goldstein & Fox P.L.L.C.
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