Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1995-12-08
1999-11-09
An, Meng-Ai T.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711119, 711121, 709200, 712 1, G06F 1200
Patent
active
059833238
ABSTRACT:
A processor node which includes at least one local bus (10) that assures a parallel link among the processors (8), a local memory (11) and a shared cache (12), and one network bus (13) that assures a parallel link among the local memory (11), the shared cache (12), and at least one input/output device (6).
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Billard Christian
Chevaux Rene
Joly Jean-Louis
Pouliquen Christian
An Meng-Ai T.
Bull S.A.
Davis Jr. Walter D.
Kondracki Edward J.
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