Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1997-03-18
1999-11-09
Beausoliel, Jr., Robert W.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 15, G06F 1116
Patent
active
059833599
ABSTRACT:
A fault recovering method for substituting an instruction processor (IP) for a system supporting processor to execute processing thereof when the system supporting processor fails. An apparatus implementing this processing method comprises a plurality of processors, at least one of which is operated as a system supporting processor (SSP) and the rest of which are operated as instruction processors. When the SSP fails, an interrupt is generated to an OS running on at least one IP. The OS recognizes that a fault occurred in the IP, abnormally terminates an application program which has been running on the IP when the interrupt was generated, or stops instruction processing as the IP falling into a hardware failure state, or input a command for disconnecting an alternate instruction processor for the system supporting processor, so that the IP takes over functions of the SSP.
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Kashiyama Yuki
Nota Tadashi
Ueno Hitoshi
Baderman Scott
Beausoliel, Jr. Robert W.
Hitachi , Ltd.
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