Processor device capable of cross-boundary alignment of...

Details Processor device capable of cross-boundary alignment of... Processor device capable of cross-boundary alignment of...

2007-12-11

2007-12-11

Kim, Matthew (Department: 2186)

Electrical computers and digital processing systems: memory

Address formation

Operand address generation

C711S154000

Reexamination Certificate

active

10987150

ABSTRACT:
A processor device capable of cross-boundary alignment of plural register data and the method thereof. The processor includes a decoder to decode a multiple shift instruction, a register unit with plural N-bit registers, a shifter to combine a first and a second output contents of the register unit to form a 2N-bit word and shift the word by w bits, thereby outputting first N bits of the word shifted, a controller to set the register unit in accordance with the multiple shift instruction decoded, thereby reading contents of corresponding registers for shifting w bits by the shifter and then writing an output of the shifter to the register unit.

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patent: 7051168 (2006-05-01), Gschwind et al.
patent: 2006/0010304 (2006-01-01), Homewood et al.

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