Processor clock governor

Details Processor clock governor Processor clock governor

1990-12-11

1992-04-21

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Applications

Control

377 28, 328138, 307518, 371 14, 371 62, H03K 519, H03M 1300, G06F 1100

Patent

active

051075237

ABSTRACT:
An input to the control unit of a microprocessor places the microprocessor in a WAIT condition whenever the input clock frequency is determined to be greater than a predetermined maximum value. An RC circuit in combination with a Schmitt trigger generates a "kill signal" whenever the time interval between successive clock pulses is less than a value corresponding to a cut-off frequency. To assure that the microprocessor is not placed in a WAIT state by an occasional "glitch" on the clock input, the kill signal applied to the microprocessor control unit is provided from a four-bit counter. If the Schmitt trigger generates a kill signal on eight consecutive clock cycles, the counter output changes state and sequencing of microcode by the control unit is suspended.

REFERENCES:
patent: 3757233 (1973-09-01), Dixon
patent: 4220010 (1980-09-01), Meisner et al.
patent: 4405982 (1983-09-01), Ruhnau et al.
patent: 4586180 (1986-04-01), Anders et al.
patent: 4752930 (1988-06-01), Kitamura et al.
patent: 4882545 (1989-11-01), Plant

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