Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1996-04-19
1998-06-30
Chin, Stephen
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
327291, 331 1A, 375327, H03D 300
Patent
active
057745110
ABSTRACT:
Within a microprocessor, multiple synchronous clock signals of arbitrary integer and non-integer ratios are produced with conventional digital divider circuitry. The various integer and non-integer clock signals can be provided to processor circuitry, bus circuitry, and coupled memory circuitry. Non-integer ratio clock signals can be produced out-of-phase with the system clock signal.
REFERENCES:
patent: 4215430 (1980-07-01), Johnson, Jr.
patent: 5155451 (1992-10-01), Gladden et al.
patent: 5184350 (1993-02-01), Dara
patent: 5230013 (1993-07-01), Hanke et al.
patent: 5256980 (1993-10-01), Itri
patent: 5258877 (1993-11-01), Leake et al.
patent: 5260979 (1993-11-01), Parker et al.
patent: 5487093 (1996-01-01), Andersen et al.
patent: 5577074 (1996-11-01), Roos et al.
A Wide-Bandwidth Low-Voltage PLL for PowerPC Micro., by Alvarez et al, Member, IEEE pp. 383-391, Apr. 1995.
Jose Alvarez, et al., "A Wide-Bandwidth Low-Voltage PLL for Power PC.TM. Microprocessors," IEEE Journal of Solid-State Circuits, vol. 30, No. 4, Apr.,1995, pp. 383-391.
Ian A. Young, et al., "A PLL Clock Generator with 5 to 110 MHz of Lock Range for Microprocessors," IEEE Journal of Solid-State Circuits, vol. 27, No. 11, Nov., 1992, pp. 1599-1607.
Chin Stephen
England Anthony V. S.
International Business Machines - Corporation
Kordzik Kelly K.
Roundtree Joseph
LandOfFree
Processor clock circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Processor clock circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Processor clock circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1868295