Electrical computers and digital processing systems: virtual mac – Task management or control
Reexamination Certificate
2011-04-12
2011-04-12
Puente, Emerson C (Department: 2196)
Electrical computers and digital processing systems: virtual mac
Task management or control
C718S102000
Reexamination Certificate
active
07926055
ABSTRACT:
The present invention provides a processor that cyclically executes a plurality of threads in accordance with an execution time allocated to each of the threads, comprising a reconfigurable integrated circuit. The processor stores circuit configuration information sets respectively corresponding to the plurality of threads, reconfigures a part of the integrated circuit based on the circuit configuration information sets, and sequentially executes each thread using the integrated circuit that has been reconfigured based on one of the configuration information sets that corresponds to the thread. While executing a given thread, the processor selects a thread to be executed next, and reconfigures a part of the integrated circuit where is not currently used for execution of the given thread, based on a circuit configuration information set corresponding to the selected thread.
REFERENCES:
patent: 6567840 (2003-05-01), Binns et al.
patent: 7308571 (2007-12-01), Barragy et al.
patent: 7716668 (2010-05-01), Moore et al.
patent: 2003/0184339 (2003-10-01), Ikeda et al.
patent: 2004/0006584 (2004-01-01), Vandeweerd
patent: 2004/0019765 (2004-01-01), Klein, Jr.
patent: 2002-544621 (2002-12-01), None
patent: WO 02/095946 (2002-11-01), None
Masahiro Iida et al., “Reconfigurable System Using Multithread Control Library Implemented as Hardware”, Technical Report of IEICE, vol. 96, No. 426, Dec. 13, 1996, 12 pages, with verification of translation.
Compton, et al. “Reconfigurable Computing: A Survey of Systems and Software”; ACM Computing Surveys, vol. 34, No. 2, Jun. 2002, pp. 171-210.
Okada, Makoto et al.; A Reconfigurable Processor Based on ALU Array Architecture with Limitation on the Interconnection; Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05); Apr. 8, 2005; pp. 1-5 (p. 6 info only).
Iida, Masahiro et al.; Reconfigurable System Using Multithread Control Library Implemented as Hardware; The Institute of Electronics Information and Communication Engineers; Technical Report of IEICE vol. 96-82, Dec. 1996; pp. 135-142; with English Abstract.
Hashimoto Takashi
Kiyohara Tokuzo
Morishita Hiroyuki
Kessler Gregory A
Panasonic Corporation
Puente Emerson C
LandOfFree
Processor capable of reconfiguring a logical circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Processor capable of reconfiguring a logical circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Processor capable of reconfiguring a logical circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2636369