Processor and pipeline reconfiguration control method

Details Processor and pipeline reconfiguration control method Processor and pipeline reconfiguration control method

2007-03-20

2007-03-20

Treat, William M. (Department: 2181)

Electrical computers and digital processing systems: processing

Processing control

Branching

C712S036000, C716S030000

Reexamination Certificate

active

11063860

ABSTRACT:
A reconfigurable processor calculates execution times of configuration for executing pipeline processing from hardware configuration information, and fixes a clock cycle until processing ends. A counter compares the fixed clock cycle with the actual number of elapsed clocks, and, when the number of elapsed clocks equals the clock cycle, it is determined that pipeline processing has ended, and a configuration controller is notified of this.

REFERENCES:
patent: 6757892 (2004-06-01), Gokhale et al.
patent: 9-237186 (1997-09-01), None
Reiner Hartenstein, “A Decade of Reconfigurable Computing: A Visionary Retrospective”, Proceedings of the Conference on Design, Automation, and Test in Europe, IEEE, Mar. 13-16, 2001, pp. 642-649.

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