Processor and method of booting same

Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration – Loading initialization program

Reexamination Certificate

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C713S001000, C714S005110, C714S038110

Reexamination Certificate

active

06883092

ABSTRACT:
A processor and method of booting the processor in which dispensable circuit operation is eliminated to reduce power consumption. A first expected check-sum value relating to instructions and table data and a second expected check-sum value relating only to instructions are held in a boot ROM. When power is turned on, if a power-on determination circuit determines that the power has been turned on for a system, a read selection circuit loads instructions and the table data into an instruction storage memory and a table data storage memory and a check-sum performing circuit performs check-sum using the first expected check-sum value. In the case where the power has been turned on for periodic operation, instructions are loaded into the instruction storage memory, check-sum is performed using the second expected check-sum value, and table data that was saved in a backup memory is loaded into the table data storage memory. Thus, the time required for loading from the boot ROM for the periodic operation decreases.

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Japanese Patent Abstract No. 09282241 date Oct. 31, 1997.
Japanese Patent Abstract No. 2000-305859, dated Nov. 2, 2000.

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