Processor and method for executing data transfer process

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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C711SE12070

Reexamination Certificate

active

07979637

ABSTRACT:
A memory transfer routine detection unit detects a combination of instructions indicating a data transfer process in a data cache by checking instruction codes and operand codes of a sequence of instructions stored in an instruction buffer. A combination of instructions representing a data transfer process in a data cache detected by the memory transfer routine detection unit are allocated to a memory transfer unit for execution.

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Japanese Office Action dated Nov. 9, 2010 (with partial English translation).

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