Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
2004-03-22
2008-05-27
Ellis, Richard L. (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Branching
Reexamination Certificate
active
07380112
ABSTRACT:
The present invention provides a processor which has a small-scale circuit and is capable of executing loop processing at a high speed while consuming a small amount of power. When the processor decodes an instruction “jloop C6,C1:C4,TAR,Ra”, the processor (i) sets a conditional flag C4to 0 when the value of a register Ra is smaller than 0, (ii) moves the value of a conditional flag C2to a conditional flag C1, moves the value of a conditional flag C3to the conditional flag C2, and moves the value of the conditional flag C4to the conditional flags C3and C6, (iii) adds −1 to the register Ra and stores the result into the register Ra, and (iv) branches to an address specified by a branch register (TAR). When not filled with a branch target instruction, the jump buffer will be filled with a branch target instruction.
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Heishi Taketo
Ogawa Hajime
Okabayashi Hazuki
Tanaka Tetsuya
Ellis Richard L.
Johnson Brian P
Matsushita Electric - Industrial Co., Ltd.
Wenderoth , Lind & Ponack, L.L.P.
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