Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2002-03-25
2004-06-01
Elmore, Reba I. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S122000, C711S132000, C711S154000
Reexamination Certificate
active
06745289
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is directed to processing network packets with multiple processing engines.
2. Description of the Related Art
Multi-processor computer systems include multiple processing engines performing operations at the same time. This is very useful when the computer system constantly receives new time-critical operations to perform.
For example, networking applications, such as routing, benefit from parallel processing. Routers receive multiple continuous streams of incoming data packets that need to be directed through complex network topologies. Routing determinations require a computer system to process packet data from many sources, as well as learn topological information about the network. Employing multiple processing engines speeds the routing process.
Another application benefiting from parallel processing is real-time video processing. A computer video system must perform complex compression and decompression operations under stringent time constraints. Employing multiple processors enhances system performance.
Parallel processing requires: (1) identifying operations to be performed, (2) assigning resources to execute these operations, and (3) executing the operations. Meeting these requirements under time and resource constraints places a heavy burden on a computer system. The system faces the challenges of effectively utilizing processing resources and making data available on demand for processing.
Over utilizing a system's processors results in long queues of applications waiting to be performed. Networking products employing traditional parallel processing encounter such processor utilization problems. These systems assign each incoming packet to a single processor for all applications. General processors, instead of specialized engines, perform applications requiring complex time-consuming operations. When each processor encounters a packet requiring complex processing, system execution speed drops substantially—processing resources become unavailable to receive new processing assignments or manage existing application queues.
Memory management also plays an important role in system performance. Many systems include main memory and cache memory, which is faster than main memory and more closely coupled to the system's processors. Systems strive to maintain frequently used data in cache memory to avoid time-consuming accesses to main memory.
Unfortunately, many applications, such as networking applications, require substantial use of main memory. Networking systems retrieve data packets from a communications network over a communications medium. Traditional systems initially store retrieved data packets in a local buffer, which the system empties into main memory. In order to perform applications using the data packets, the system moves the packets from main memory to cache memory—a time consuming process.
Traditional systems also incur costly memory transfer overhead when transmitting data packets. These systems transfer transmit packet data into main memory to await transmission, once processor operation on the data is complete—forcing the system to perform yet another main memory transfer to retrieve the data for transmission.
A need exists for a parallel processing system that effectively utilizes and manages processing and memory resources.
SUMMARY OF THE INVENTION
A multi-processor in accordance with the present invention efficiently manages processing resources and memory transfers. The multi-processor assigns applications to compute engines that are coupled to cache memory. Each compute engine includes a central processing unit coupled to coprocessor application engines. The application engines are specifically suited for servicing applications assigned to the compute engine. This enables a compute engine to be optimized for servicing the applications it will receive. For example, one compute engine may contain coprocessor application engines for interfacing with a network, while other coprocessors include different application engines.
The coprocessors also offload the central processing units from processing assigned applications. The coprocessors perform the applications, leaving the central processing units free to manage the allocation of applications. The coprocessors are coupled to the cache memory to facilitate their application processing. Coprocessors exchange data directly with cache memory—avoiding time consuming main memory transfers found in conventional computer systems. The multi-processor also couples cache memories from different compute engines, allowing them to exchange data directly without accessing main memory.
A multi-processor in accordance with the present invention is useful for servicing many different fields of parallel processing applications, such as video processing and networking. One example of a networking application is application based routing. A multi-processor application router in accordance with the present invention includes compute engines for performing the different applications required. For example, application engines enable different compute engines to perform different network services, including but not limited to: 1) virtual private networking; 2) secure sockets layer processing; 3) web caching; 4) hypertext mark-up language compression; and 5) virus checking.
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Ganesan Elango
Gruner Frederick
Panwar Ramesh
Zaidi Nazar
Elmore Reba I.
Juniper Networks, Inc.
Shumaker & Sieffert P.A.
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