Processing exceptions from 64-bit application program...

Electrical computers and digital processing systems: processing – Processing control – Mode switch or change

Reexamination Certificate

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Details

C712S244000

Reexamination Certificate

active

07451298

ABSTRACT:
One embodiment of the present invention provides a system that uses an M-bit operating system (OS) kernel to support N-bit user processes. During operation, the system receives an exception. Note that the exception can be any event that needs to be handled by executing OS kernel code. Specifically, the exception can be a hardware interrupt, a software interrupt, an asynchronous interrupt, a synchronous interrupt, a signal, a trap, or a system call. Next, the system handles the exception by first switching the processor to the M-bit mode, and then executing M-bit OS kernel code which is designed to handle the exception. Note that the processor may primarily be designed to operate in the N-bit mode; the M-bit mode may primarily be provided for backward compatibility reasons.

REFERENCES:
patent: 5734904 (1998-03-01), Kanamori et al.
patent: 5968174 (1999-10-01), Hughes
patent: 6973562 (2005-12-01), McGrath et al.
patent: 7260702 (2007-08-01), Vega et al.
patent: 2006/0212609 (2006-09-01), Zimmer et al.

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