Processing architecture having passive threads and active...

Details Processing architecture having passive threads and active... Processing architecture having passive threads and active...

2011-03-08

2011-03-08

Zhen, Li B (Department: 2195)

Electrical computers and digital processing systems: virtual mac

Task management or control

Process scheduling

Reexamination Certificate

active

07904907

ABSTRACT:
Multiple parallel passive threads of instructions coordinate access to shared resources using “active” semaphores. The semaphores are referred to as active because the semaphores send messages to execution and/or control circuitry to cause the state of a thread to change. A thread can be placed in an inactive state by a thread scheduler in response to an unresolved dependency, which can be indicated by a semaphore. A thread state variable corresponding to the dependency is used to indicate that the thread is in inactive mode. When the dependency is resolved a message is passed to control circuitry causing the dependency variable to be cleared. In response to the cleared dependency variable the thread is placed in an active state. Execution can proceed on the threads in the active state.

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