Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1997-05-19
2000-07-25
Whitehead, Jr., Carl
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
438253, 438255, 438396, H01L 218242
Patent
active
060936177
ABSTRACT:
A process for forming HSG polysilicon has been developed. The process features initially depositing an amorphous silicon layer, at a temperature between about 490 to 550.degree. C. The amorphous silicon layer is then subjected to an in situ anneal procedure, at a temperature between about 600 to 650.degree. C., and at a pressure between about 0.5 to 1.5 mTorr, for about 30 min, to convert the amorphous silicon layer to a HSG polysilicon layer. The surface roughness of the HSG polysilicon, when used as the top layer of a storage node structure, of a stacked capacitor structure, results in a surface area increase of about 50%, thus offering increases in capacitance.
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Liang Mong-Song
Su Chung-Hui
Ackerman Stephen B.
Jr. Carl Whitehead
Saile George O.
Taiwan Semiconductor Manufacturing Company
Thomas Toniae M.
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