Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1998-09-16
2000-03-14
Bowers, Charles
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438301, 438725, 148DIG53, H01L 2100
Patent
active
060371951
ABSTRACT:
A process of producing a thin film transistor of a liquid crystal display device according to the present invention comprises the steps of forming a semiconductor layer on an insulation substrate, stacking an insulation film and a conductive layer on the semiconductor layer, patterning the conductive layer to form a gate electrode, reducing a width of a mask used at formation of the gate electrode in a prescribed amount to form an offset region, implanting highly concentrated impurity ions into a part of the semiconductor layer where there are not the mask or the conductive layer to form an N.sup.+ -polysilicon layer, re-etching the conductive layer by using the mask used at formation of the gate electrode made narrower by the offset region, and implanting low concentrated impurity ions into the semiconductor layer below the conductor region removed by re-etching to form an N.sup.- -polysilicon layer.
REFERENCES:
patent: 5292675 (1994-03-01), Codama
patent: 5476802 (1995-12-01), Yamazaki et al.
patent: 5698881 (1997-12-01), Yoshitomi et al.
Ono et al., A 40 nm Gae Length n-MOSFET, pp. 1822-1830, IEEE, V. 42, No. 10, Oct. 1995.
Hirayama Hideo
Toriyama Shigetaka
Bowers Charles
Hawranek Scot J.
Kabushiki Kaisha Toshiba
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