Process of forming trench isolation device

Details Process of forming trench isolation device Process of forming trench isolation device

1996-04-23

1999-08-03

Fourson, George

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Total dielectric isolation

438425, H01L 2176

Patent

active

059337460

ABSTRACT:
A bonded wafer 100 has a device substrate 16 with isolation trenches 30 defining device regions 18. Oxide dogbone structures are removed before filling trenches 30. Voids 36 in the trenches are spaced from the top of the trenches. The trenches are covered with an oxide layer 30 and filled with polysilicon 34. A LOCOS mask structure comprising a layer of CVD pad oxide and silicon nitride 50 cover the trenches and the adjacent device substrate regions.

REFERENCES:
patent: 4532701 (1985-08-01), Kameyama et al.
patent: 5084408 (1992-01-01), Baba et al.
patent: 5116779 (1992-05-01), Iguchi
patent: 5217919 (1993-06-01), Gaul et al.
patent: 5712205 (1998-01-01), Park et al.

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