Process of forming metal silicide interconnects

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

438626, 438629, 438186, 438195, H01L 21337, H01L 214763

Patent

active

060460989

ABSTRACT:
A process for forming a metal suicide interconnect includes applying a layer of polysilicon over a semiconductor layer. A layer of amorphous silicon is formed over the layer of polysilicon followed by a layer of metal, such as titanium, over the layer of amorphous silicon. The layer of titanium is reacted with the layer of amorphous silicon to form a small grain C49 layer of titanium silicide. The layer of polysilicon and the layer of titanium silicide are etched to form a desired interconnect structure. The small grain C49 layer of titanium silicide is then converted to the C54 phase.

REFERENCES:
patent: 4557943 (1985-12-01), Rosier et al.
patent: 4708904 (1987-11-01), Shimizu et al.
patent: 5023201 (1991-06-01), Stanasolovich et al.
patent: 5173450 (1992-12-01), Wei
patent: 5223456 (1993-06-01), Malwah
patent: 5344729 (1994-09-01), Akins et al.
patent: 5543361 (1996-08-01), Lee et al.
patent: 5670397 (1997-09-01), Chang et al.
patent: 5763923 (1998-06-01), Hu et al.
patent: 5773360 (1998-06-01), Chang et al.
patent: 5804499 (1998-09-01), Dehm et al.
patent: 5814557 (1998-09-01), Venkatraman et al.
patent: 5858872 (1999-01-01), Kim
patent: 5904516 (1999-05-01), Park
patent: 5981367 (1999-11-01), Gonzlaez
Kittl, Hong, Rodder, Prinslow and Misium, "A Ti Salicide Process for 0.10 .mu.m Gate Length CMOS Technology", from 1996 Symposium Technology Digest of Technical Papers, pp. 14 and 15, month unknown.
Ando, Matsubara, Ishigami, Horiuchi and Nishimoto, "Novel Salicide Technology Using Ti Hydrogenation for 0.1-.mu.m CMOS", from 1996 Symposium on VLSI Technology Digest of Tech. Papers, pp. 16-17, month unknown.
S. Wolf, Silicon Processing for the VLSI Era, Volume 2--Process Integration, 1990, pp. 144-150, month Unknown.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Process of forming metal silicide interconnects does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process of forming metal silicide interconnects, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process of forming metal silicide interconnects will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-364582

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.