Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1998-02-23
2000-04-04
Nelms, David
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438626, 438629, 438186, 438195, H01L 21337, H01L 214763
Patent
active
060460989
ABSTRACT:
A process for forming a metal suicide interconnect includes applying a layer of polysilicon over a semiconductor layer. A layer of amorphous silicon is formed over the layer of polysilicon followed by a layer of metal, such as titanium, over the layer of amorphous silicon. The layer of titanium is reacted with the layer of amorphous silicon to form a small grain C49 layer of titanium silicide. The layer of polysilicon and the layer of titanium silicide are etched to form a desired interconnect structure. The small grain C49 layer of titanium silicide is then converted to the C54 phase.
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Kittl, Hong, Rodder, Prinslow and Misium, "A Ti Salicide Process for 0.10 .mu.m Gate Length CMOS Technology", from 1996 Symposium Technology Digest of Technical Papers, pp. 14 and 15, month unknown.
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Lebentritt Michael S.
Micro)n Technology, Inc.
Nelms David
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