Process monitor circuitry for integrated circuits

Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed

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438 11, 702 65, 327 35, 327378, 324713, H01L 2166

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active

061241431

ABSTRACT:
Process monitoring circuitry according to the invention incorporates additional routing structures that approximate signal delays due to long metal routing paths. The additional process monitor circuitry builds upon existing approaches without increasing the die size of an integrated circuit through the utilization of excess silicon space available between the bonding pads and the scribe lines of an integrated circuit wafer. More specifically, supplemental metal routing lines and vias are included in the delay paths of process monitor circuitry and located on the integrated circuit such that impact to other metal signal lines/vias used in the actual design is minimized. The supplemental metal routing lines are disposed in unused routable silicon space, such that no silicon area penalty is suffered as a result of having long metal routing lines. During the testing of an integrated circuit incorporating the improved process monitor circuitry, test signals for determining the relative strength of different types of transistors of the integrated circuit are extracted. These test signals are compared to simulated delay values that reflect the delays of the additional metal routing lines and vias. Extreme process variations cause the values provided by the process monitor's circuitry to fall outside the set of permissible values determined through three-dimensional simulation. Thus, process monitoring circuitry according to the present invention improves the fault coverage provided by the testing procedures for an integrated circuit by providing information regarding process variations in different metal layers, and may be utilized as a surrogate for observable path testing.

REFERENCES:
patent: 5068547 (1991-11-01), Gascoyne
patent: 5486786 (1996-01-01), Lee
patent: 5631596 (1997-05-01), Sporck et al.
patent: 5654895 (1997-08-01), Bach et al.
patent: 5686855 (1997-11-01), Lee
patent: 5798649 (1998-08-01), Smayling et al.
patent: 5867033 (1999-02-01), Sporck et al.
patent: 5903012 (1999-05-01), Boerstler
LSI Logic Datasheet--Process Monitor (PROCMON) Cell, Feb. 1997 (10 pages).

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