Process leakage evaluation and measurement method

Details Process leakage evaluation and measurement method Process leakage evaluation and measurement method

1996-08-26

1998-04-28

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Flip-flop

365156, 365201, G11C 1100

Patent

active

057454051

ABSTRACT:
A method and an apparatus for the measurement and evaluation of leakage currents within an SRAM cell is described. The leakage current is present in the cutoff device of a cross coupled pair of field effect transistors in a four transistor SRAM cell. Each of the load resistors of the SRAM cell is connected through a pass gate to a chain of high value resistances to the contact structure that is connected to a power supply voltage source. An expected value of leakage current is less than the quotient of the difference of the magnitude of the power supply voltage source and the threshold voltage of the cutoff field effect transistor of the cross coupled pair of field effect transistors, and the summation of the ohmic value of the load resistor of the SRAM cell and the ohmic value of all the resistors in the chain of high value resistance between the contact structure and the pass gate connecting the SRAM cell to the chain of high value resistances. If the leakage current is lower than the expected leakage current the SRAM cell has passed and if the leakage current is higher than the expected leakage current, the SRAM cell has failed. The measurement of a large number of SRAM cells will allow a sufficiently large sampling of data to evaluate the effects of modifying semiconductor parameters upon the leakage current within the SRAM cells.

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