Process for vertically patterning substrates in...

Semiconductor device manufacturing: process – Making passive device – Trench capacitor

Reexamination Certificate

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C438S243000, C438S248000, C438S388000, C438S391000, C257S301000, C257SE27092, C257SE29346, C257SE21396

Reexamination Certificate

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07344953

ABSTRACT:
On a substrate surface, which has been patterned in the form of a relief, of a substrate, typically of a semiconductor wafer, a deposition process is used to provide a covering layer on process surfaces which are vertical or inclined with respect to the substrate surface. The covering layer is patterned in a direction which is vertical with respect to the substrate surface by limiting a process quantity of at least one precursor material and/or by temporarily limiting the deposition process, and is formed as a functional layer or mask for subsequent process steps.

REFERENCES:
patent: 6232171 (2001-05-01), Mei
patent: 6759292 (2004-07-01), Seitz et al.
patent: 7160577 (2007-01-01), Ahn et al.
patent: 2001/0054769 (2001-12-01), Raaijmakers et al.
patent: 2002/0014647 (2002-02-01), Seidl et al.
patent: 2003/0114018 (2003-06-01), Gutsche et al.
patent: 2003/0181006 (2003-09-01), Schrems

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