Active solid-state devices (e.g. – transistors – solid-state diode – Specified wide band gap semiconductor material other than... – Diamond or silicon carbide
Reexamination Certificate
1998-12-14
2003-03-11
Turner, Archene (Department: 1775)
Active solid-state devices (e.g., transistors, solid-state diode
Specified wide band gap semiconductor material other than...
Diamond or silicon carbide
C428S212000, C428S336000, C428S408000, C428S446000, C428S698000, C428S701000, C428S702000
Reexamination Certificate
active
06531714
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device having improved adhesion at the interface between layers of dielectric material. The present invention also relates to a semiconductor device achievable by this method. The present invention further relates to a ternary dielectric compound of silicon, oxygen and carbon, and particularly for use as an adhesion layer between superimposed dielectric materials as well as to a process for producing this ternary dielectric compound.
2. Discussion of the Related Art
In present electronic and optoelectronic technology, the importance of the dielectric materials used in the realization of so-called semiconductor devices is well known. By the term “semiconductor”, it is meant a device whose operation utilizes the physical properties of a semiconductor material which is a constitutive part of it. A semiconductor device can, for example, include in the microelectronics field one or more integrated electronic circuits formed in a semiconductor material.
In a semiconductor device, layers of dielectric materials have insulation functions, electrical and thermal, between different zones of the device or between the device and the external environment and/or act as barriers for contaminating substances coming from the external environment. Typical dielectric materials in the specific field of microelectronics, (i.e. of integrated circuits), are silicon oxides, doped or undoped, silicon oxynitrides and silicon nitrides.
In the structure of an integrated circuit, a certain number of layers of dielectric material are commonly superimposed. In the different manufacturing steps of the integrated electronic device these layers, identical or different in composition, are formed in succession. This happens, for example, in some passivation steps, final, intermediate or intermetal, (i.e., between two metallization levels of the device). The insulating ability of a multilayer dielectric is greater than that of a single layer. Often, there are intermediate operations performed after formation of a layer and before formation of the next layer. For example, a sacrificial layer is formed which is then totally or partly removed, or it is the first layer which is partially removed. In any case, the successive layer has portions of surface at least partially in contact with the immediate underlying layer or layers.
For good operation of the circuit and hence integrity of the semiconductor device, it is preferable that the layers of dielectric material be very adherent in the contact zones. However, as known, in present technology it sometimes happens that the layers of superimposed dielectric materials exhibit adhesion problems and tend to detach themselves. This phenomenon is known as peeling.
The cause of this problem is not yet sufficiently clear or complete to those skilled in the art. However, the problem of poor adhesion exists primarily due to the fact that the materials are in the form of layers. Each material in layer form exhibits an internal stress which causes curving of the layer when superimposed on another layer. If the stress is particularly high so as to generate forces at the interface which are greater than the adhesion forces between the layers, peeling occurs.
A very important cause of the failed adhesion is the present techniques for layer formation. Conventionally, the layers of dielectric material except the first, which commonly can be obtained thermally, are formed by deposition. The technique most commonly used is chemical deposition in vapour phase, known as CVD (Chemical Vapour Deposition). Chemical precursors of the elements which are to be deposited are reacted in the gaseous state in a reactor. Usually a chemical precursor is used for each of the elements included in the compound to be formed.
A dielectric deposited by the CVD technique is not perfectly uniform in structure and composition along the direction of deposition even if the process parameters are well controlled. In particular if the Plasma Enhanced CVD (PECVD) technique is used in the first stages of the deposition, in which a specific reactor is used and the reactive species are generated in the form of plasma in the reaction chamber, the parameters of deposition are not fully controllable. Between ignition of the plasma and the stationary state of operation of the reactor, there is a brief period of settlement before the deposition speed reaches steady state. The structural and compositional non-uniformity in the surface regions obstructs adhesion of the successive layer to the surface on which the deposition takes place.
In addition, it is necessary to consider that saturation of the surface bonds due to the presence of spurious atoms or even mere interruption of the deposition process makes adhesion with the successive layer more difficult. This can happen, for example, in the case where the free surface has been subjected to a previous treatment such as a chemical etching for removal of a sacrificial layer before deposition of the successive layer.
The different manufacturing steps of the device fulfill another important role in aggravating the adherence difficulties. Mechanical stresses generate internal stress, for example, during a separation phase of the individual devices on a semiconductor chip by cutting the semiconducting chip on which the different integrated circuits are formed. In addition, allowance must be made for temperature variations and attacks of contaminants from the external environment which can occur during the circuit manufacturing cycle. These effects tend to degrade the interlayer bonds.
It is known experimentally that the lack of adhesion is more or less acute depending on the composition and structure of the materials making up the layers. Therefore, known techniques for improving adhesion must be chosen differently depending on the composition of the layers in contact and on the process, which the surface on which the deposition takes place, has been exposed.
In the case where the materials are doped or undoped silicon oxides to increase adhesion between the layers of dielectric materials, some known techniques consist of treating the free surface where the deposition takes place.
In order to ensure adhesion between the layers of a semiconductor device, it has been proposed to mechanically increase the roughness of the surface and, hence, the gripping area for the reagents to be deposited. One known solution calls for bombardment of the surface by a sputtering technique with nitrogen or inert gas ions (e.g., argon) in plasma. This solution is commonly applied for silicon oxides and in particular for silicon oxides deposited using TEOS (tetraethylorthosilicate) as the chemical precursors for the silicon.
Another solution proposed by the prior art is appropriate in the case where the surface incorporates spurious chemical elements (e.g., residues of a previous etching process). In this case, to improve the chemical uniformity of the interface, cleaning is performed by chemical etching in plasma (dry etching) with ions of various types (e.g., oxygen or mixtures of N
2
and NH
3
) or in solution (wet etching).
These techniques, optionally used in succession, are not, however, sufficiently effective to prevent detachment of adjacent layers when they include silicon oxynitrides and silicon nitrides. These materials exhibit a particularly high intrinsic stress, and therefore, the above mentioned mechanical and chemical methods for improvement of the deposition surface are not effective.
Where the adjacent layers include silicon oxynitrides and silicon nitrides it has been proposed (e.g., as described in European patent application EP-A-0627763 of this applicant) to interpose a layer of oxide between adjacent layers of dielectric material and in particular either doped or undoped silicon dioxide (i.e., stoichiometric silicon oxide). This technique exhibits the disadvantage of being effective mainly where the layers of dielectric material consist of silicon
Bacchetta Maurizio
Queirolo Giuseppe
Zanotti Luca
McClellan William R.
Morris James H.
SGS--Thomson Microelectronics S.r.l.
Turner Archene
Wolf Greenfield & Sacks P.C.
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