Process for the preparation of large area TFT arrays

Details Process for the preparation of large area TFT arrays Process for the preparation of large area TFT arrays

1980-11-03

1982-05-25

Brammer, Jack P.

Radiation imagery chemistry: process, composition, or product th

Imaging affecting physical property of radiation sensitive...

Making electrical device

29571, 29580, 204192E, 156643, 156649, 156656, 156657, 427 99, 430314, 430316, 430317, C03C 500, G03C 1100

Patent

active

043317588

ABSTRACT:
Thin film transistor arrays are prepared by a vacuum deposition technique wherein only a single deposition of discrete areas of an insulating material are deposited through a mask. No registration is required to form the various elements of the transistors. A unique structure is described wherein the contact of the semiconductor material with the source electrode, the source bus conductors, and the drain electrode is coterminous with conductive material forming the source electrode and bus conductors and the drain electrode.

REFERENCES:
patent: 3669661 (1972-06-01), Page et al.
patent: 4013502 (1977-03-01), Staples
patent: 4040073 (1977-08-01), Luo
patent: 4042854 (1977-08-01), Luo
patent: 4086127 (1977-08-01), Cresswell

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