Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
1999-10-15
2001-03-06
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S906000, C438S974000
Reexamination Certificate
active
06197695
ABSTRACT:
TECHNICAL FIELD
This invention relates to a process for the manufacture of passive and active components on the same insulating substrate. It is particularly applicable to the manufacture of hyperfrequency circuits and particularly integrated hyperfrequency components called “Monolithic Microwave Integrated Circuits” (MMIC), comprising integrated active components (transistors) and passive components (for example inductors).
STATE OF PRIOR ART
Hyperfrequency circuits are composed of active components (for example transistors) and passive components or elements (for example resistors, capacitors, inductors, and conducting lines). The performances of these circuits in terms of speed and gain are related to the performances of active components (speed, gain, voltage withstand, etc.), and also to losses in passive components. Hyperfrequency circuits can be made in two different ways:
1) either from passive and active elements made separately and assembled in hybrid modules,
2) or monolithically. In this case passive elements are drawn and made in the form of metallic lines on the same semiconducting substrate as the substrate in which the active elements are made.
In the second case, losses in passive elements are much higher due to the conductivity of the semiconducting substrate.
A good substrate for hyperfrequency components is actually an insulating substrate with a low dielectric constant. It is important to keep passive elements as far away as possible from any conducting material. However, it is impossible to obtain perfectly insulating silicon substrates. This is one of the reasons why preference is given to other semiconductors such as AsGa which can itself be semi-insulating, for the production of high performance hyperfrequency components.
However, the use of the semiconducting materials other than silicon is not satisfactory for two reasons:
the manufacture of components then become significantly more expensive;
an attempt is increasingly made to assemble all hyperfrequency analog components (reception, transmission, modulation, amplification), and the control and logical processing part (base band) on the same chip, particularly for portable electronic equipment (see the article entitled “High-Frequency Semiconductor Devices for Mobile Telecommunication Systems” by C. KUSANO et al., Hitachi Review Vol. 46, 1997, No. 1). These are referred to as “mixed mode ICs” (see U.S. Pat. No. 5,492,857). Silicon is the preferred material for the manufacture of logic circuits. It is still the only material that can be considered for these logic functions and will remain so for many years. Adding hyperfrequency functions onto the same silicon chip would require that loss problems in passive elements related to the non-zero conductivity of the silicon substrate would have to be solved, and also the coupling problem between hyperfrequency parts and logic parts of the circuit, also due to the conducting substrate, would have to be solved. These couplings induce disturbances that can be harmful to the logic signals. Therefore, there are no mixed mode ICs on the market at the present time.
Therefore, hyperfrequency circuits are made on specific chips, either on GaAs, or on silicon.
Several solutions have been proposed to reduce the negative effect of the silicon substrate.
A first solution consists of using SOI (Silicon On Insulator) type substrates. These structures are particularly attractive for the logic part of mixed mode ICs (lower consumption). However, they provide a very imperfect solution to the problem of losses in the substrate, which remains more or less conducting silicon. The use of high resistivity “area fusion” type silicon was proposed (see the article “MICROX™—An All-Silicon Technology for Monolithic Microwave Integrated Circuits” by M. H. HANES et al., IEEE Electron Device Letters, Vol. 14, No. 5, May 1993, pages 219-221), but this type of substrate is expensive and cannot be used for diameters greater than 150 mm, and in any case it does not completely eliminate losses.
A second solution consists of using Silicon On Sapphire (SOS) type substrates, as is divulged in U.S. Pat. No. 5,492,857. SOS substrates are made by a heteroepitaxy of silicon on a monocrystalline corundum (Al
2
O
3
) substrate which is an insulator. In this case, as in the case of SOI, the active components are made in a thin silicon surface layer and are insulated from each other by local elimination of the silicon layer. Passive components can then be made by metallizations located adjacent to active components. The fact that the substrate is perfectly insulating can give very low losses for these passive components. Hyperfrequency circuits were made on substrates with very interesting results. Nevertheless, these substrates have serious disadvantages. They are expensive and difficult to manipulate in device manufacturing lines and require special processes. Furthermore, the crystalline quality of the epitaxied silicon layer is not very good.
A third solution consists of using conventional (massive) silicon substrates with a special design for passive elements on several metallization layers and separation of the metallic layers forming the passive elements by thick insulation layers (see the article entitled “Integrated RF and Microwave Components in BiCMOS Technology”, J. N. BURGHARTZ et al., IEEE Transactions on Electron Devices, Vol. 43, No. 9, Sep. 1996, pages 1559-1570). This solution is not satisfactory either, because the effect of the conducting substrate is still significant although it is reduced. As in the case of the SOI substrate, it may be necessary to use the high resistivity area fusion type silicon substrate.
DESCRIPTION OF THE INVENTION
In order to overcome the problems mentioned above, this invention proposes an innovative technique for making electronic circuits comprising active components, and passive components and/or elements. This technique is particularly applicable to making hyperfrequency circuits.
Therefore, the purpose of the invention is a process for the manufacture of at least one electronic structure comprising at least one active component and at least one passive component or element on a support substrate made of an insulating material, characterized in that it comprises the following steps.
make the active component in a surface layer made of semiconducting material from an initial substrate comprising a wafer of semiconducting material supporting the said surface layer,
make electrical insulation areas capable of insulating the passive component or element from the active component,
make the passive component or element on and/or in the electrical insulation areas,
prepare the surface of the initial substrate face with the said electronic structure to make this face compatible for bonding with another substrate by molecular bonding,
perform the said bonding, the other substrate being the said support substrate made of an insulating material,
eliminate all or part of the wafer of semiconducting material.
The initial substrate may also comprise an insulating layer between the wafer made of semiconducting material and the surface layer.
Electrical insulation areas may be obtained by eliminating the surface layer, except for the area in which the said active component is formed, and by replacing it by a dielectric material. They may also be obtained by oxidation of the surface layer, except for the area in which the said active component is formed. They may also be obtained by bombardment of the surface layer by particles, except for the area in which the said active component is formed, this bombardment by particles making the semiconducting material insulating.
Production of the electrical insulation areas may include the formation of an insulating layer.
Advantageously, the passive component or element is made by deposition and photolitho-etching of the metallic layer.
Surface preparation may include the deposition of a planarization layer on the said face to be bonded, followed by polishing this planarization layer.
The bonding step may be achieved by choosi
Aspar Bernard
Biasse Beatrice
Joly Jean-Pierre
Zussy Marc
Burns Doane , Swecker, Mathis LLP
Chen Kin-Chan
Commissariat A l'Energie Atomique
Utech Benjamin L.
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