Process for the manufacture of an integrated voltage limiter and

Details Process for the manufacture of an integrated voltage limiter and Process for the manufacture of an integrated voltage limiter and

1995-06-07

1997-02-04

Fers, Terrell W.

Static information storage and retrieval

Systems using particular element

Semiconductive

36518533, G11C 1300

Patent

active

056005903

ABSTRACT:
A process for the manufacture of an integrated voltage limiter and stabilizer component in a flash EEPROM memory device comprises a step of formation of an N type lightly doped well on a single-crystal silicon substrate; a step of formation of an active area on the surface of said N type well; a step of growth of a thin gate oxide layer over said active area; a step of implantation of a first heavy dose of N type dopant into said N type well to obtain an N type region; a step of implantation of a second heavy dose, higher than said first heavy dose, of N type dopant into said N type region to obtain an N+contact region to both the N type well and said N type region; a step of implantation of a third heavy dose, higher than said first heavy dose, of P type dopant into said N type region to form a P+ region.

REFERENCES:
patent: 4473941 (1984-10-01), Turi et al.
patent: 4694428 (1987-09-01), Matsumura et al.
patent: 5103425 (1992-04-01), Kuo et al.
patent: 5170232 (1992-12-01), Narita
patent: 5322803 (1994-06-01), Cappeletti et al.

Affiliated with

Also associated with

Rating

Process for the manufacture of an integrated voltage limiter and does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for the manufacture of an integrated voltage limiter and, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for the manufacture of an integrated voltage limiter and will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-685850