Process for synchronizing a computer system and computer system

Details Process for synchronizing a computer system and computer system Process for synchronizing a computer system and computer system

1998-09-04

2000-06-06

Palys, Joseph E.

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

713600, G06F 104

Patent

active

060732474

ABSTRACT:
The invention relates to a process for synchronizing a computer system with regard to a date which changes over time. The computer system comprises one or more modules (1, 2, 3, 4), each module (1, 2) comprising several processors (10, 11, 12, 13, 20, 21, 22, 23) regulated by a clock specific to a module (1, 2). Each processor (10, 11, 12, 13, 20, 21, 22, 23) comprises a private register TBR (16, 17, 18, 19, 26, 27, 28, 29) adapted to contain a value corresponding to said date and to undergo an incrementation by the clock specific to the module (1, 2) comprising this processor (10, 11, 12, 13, 20, 21, 22, 23). A processor (10) is selected as the master of the system so as to instruct each of the other processors (11, 12, 13, 20, 21, 22, 23) which function as a salve to place the master processor and to declare said master processor in a ready state which consists, for each slave processor (11, 12, 13, 20, 21, 22, 23), in waiting for an authorization from the master processor (10) of the system, without being able to be interrupted. Each processor (10, 11, 12, 13, 20, 21, 22, 23) possessing the said authorization, immediately reads the contents of a register TBC (50, 51) common to the processors (10, 11, 12, 13, 20, 21, 22, 23) of one and the same module (1, 2) and writes these contents to an associated register (16, 17, 18, 19, 26, 27, 28, 29) TBR without being able to be interrupted.

REFERENCES:
patent: 4890222 (1989-12-01), Kirk
patent: 5305453 (1994-04-01), Boudry et al.
patent: 5404565 (1995-04-01), Gould et al.
patent: 5537549 (1996-07-01), Gee et al.
patent: 5592125 (1997-01-01), Williams
patent: 5640523 (1997-06-01), Williams
patent: 5684803 (1997-11-01), Nguyen Thuy
patent: 5729721 (1998-03-01), Bettelheim et al.
patent: 5777870 (1998-07-01), Takaku
"Synchronizing Time-Of-Day Clocks in Coupled Computer System", IBM Technical Disclosure Bulletin, vol. 36, No. 8, Aug. 1, 1993, pp. 617-619, XP000390352.
"Primary Clock Synchronization Facility" Research Disclosure, No. 330, Oct. 1, 1991, p. 768,XP000265018.
Riccardo Gusella and Stefano Zatti, "An Election Algorithm for a Distributed Clock Synchronization Program", The 6th International Conference on Distributed Computing Systems, IEEE Computer Society, 19-23 May 1986, Cambridge, Mass., US pp. 364-371, XP002067187.
Liskov, B: "Practical Uses of Synchronized Clocks in Istributed Systems" Distributed Computing, vol. 6, No. 4, Jul. 1, 1993, pp. 211-219, XP000382321.

Affiliated with

Also associated with

Rating

Process for synchronizing a computer system and computer system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for synchronizing a computer system and computer system , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for synchronizing a computer system and computer system will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2224189