Process for reflow bonding a semiconductor die to a substrate an

Details Process for reflow bonding a semiconductor die to a substrate an Process for reflow bonding a semiconductor die to a substrate an

1995-08-25

1998-09-22

Graybill, David E.

Fishing, trapping, and vermin destroying

437215, 437224, H01L 2156, H01L 2158, H01L 2160

Patent

active

058113177

ABSTRACT:
A method for assembly of bare silicon die onto flexible or thin laminate substrates that minimizes substrate and die warpage induced after underfill cure operations and at the same time reduces the cycle time for the assembly process. More specifically, an opposing layer of thermoset component is adhered to a balance plate (metal) or other material with applicable coefficient of thermal expansion "CTE" and modulus of elasticity on the top of the die. The offsetting layer of material causes the die to warp to the other side and as a result the two self opposing warpage effects neutralize themselves.

REFERENCES:
patent: 5037780 (1991-08-01), Fujimoto et al.
patent: 5071787 (1991-12-01), Mori et al.
patent: 5292688 (1994-03-01), Hsiao et al.
patent: 5352629 (1994-10-01), Paik et al.

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