Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1997-07-18
2000-05-02
Bowers, Charles
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438659, 438216, H01L 21318
Patent
active
060572175
ABSTRACT:
A MOS field effect transistor (MOSFET) comprising a semiconductor substrate 11 having thereon a gate silicon dioxide film 12 and a gate electrode 13 both formed by patterning, wherein in only at least one edge of gate lengthwise direction of the gate silicon dioxide film 12 is formed a region 14 containing an element (e.g. nitrogen) which is different from the elements constituting the silicon dioxide film and whose energy of bonding with silicon is larger than the energy of hydrogen-silicon bonding. In this MOSFET, the reliability reduction caused by the local degradation of the gate silicon dioxide film appearing at the edge of its lengthwise direction can be suppressed and, moreover, the property reduction can be suppressed.
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K. Uwasawa et al., "A New Degradation Mode of Scaled p+ Polysilicon Gate pMOSFETs Induced by Bias Temperature (BT) Instability", IEDM 95, pp. 871-874.
Bowers Charles
NEC Corporation
Nguyen Thanh
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