Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2000-03-08
2001-12-04
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S785000
Reexamination Certificate
active
06326318
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a semiconductor device and a process for producing the same. Particularly, the present invention relates to a technique for forming an interlayer insulating film between wirings or on a transistor.
2. Description of the Related Art
Recently, multilayered wirings employed in highly integrated semiconductor devices are required to have lower contact resistance between laminated wirings and more improved wiring reliability. Integration of semiconductor devices is still progressing. Accordingly, for example, in a wiring structure of the type where an insulating layer is located between a first wiring layer and a second wiring layer, contact holes (including via-holes) to be formed in the insulating layer are required to have smaller diameters.
However, if the diameters of contact holes are reduced, it is difficult to deposit a wiring material in the contact holes with a sufficient thickness. Accordingly, it has been proposed to form plugs for connecting the first wiring layer and the second wiring layer by depositing a suitable metal such as tungsten, aluminum, nickel or copper in the contact holes by means of CVD (Chemical Vapor Deposition) method.
The blanket-tungsten CVD method among others can achieve efficient embedding of tungsten in the contact holes, and it is an important technique in forming multilayered wirings. According to the blanket-tungsten CVD method, tungsten is allowed to grow not only in the contact holes but also on the upper surface of the interlayer insulating film containing the contact holes, and then the tungsten present on the surface of the insulating film is etched back. This technique is disclosed, for example, in Japanese Unexamined Patent Publication No. Hei 4-307934.
In the conventional multilayered wiring forming technique, if the surface of the interlayer insulating film is not flat, steps are formed in the wirings formed on the insulating film, which may cause troubles such as disconnection. Accordingly, the surface of the interlayer insulating film should be as flat as possible so as to achieve planarization of the surface of the device. Such technique is referred to as a planarization technique and is becoming more and more important as the wirings are becoming finer and highly multilayered.
SOG (Spin-On-Glass) films are one type of interlayer insulating films that are most frequently employed in the planarization technique, and they are discussed particularly in a planarization technique utilizing flow characteristics of the interlayer insulating film material. SOG is a generic name for films that contain silicon dioxide as a major component and are formed from a solution of a silicon-containing compound in an organic solvent.
When an SOG film is to be formed, a solution of a silicon-containing compound in an organic solvent is first dropped onto the substrate, and then the substrate is rotated. Thus, a film of the solution is formed such that the steps formed on the substrate by the wiring are compensated for. That is, the solution collects in recesses. Thus, the surface of the film of the solution is planarized. Next, the thus treated substrate is subjected to thermal treatment to evaporate the organic solvent and promote a polymerization reaction of the silicon-containing compound, which results in an SOG film having a flat surface.
SOG films include inorganic SOG films, in which the silicon-containing compounds contain no organic component as represented by the general formula (1):
[SiO
2
]
n
(1),
and organic SOG films, in which the silicon-containing compounds contain organic components as represented by the general formula (2):
[R
x
SiO
y
]
n
(2)
Wherein n, x and y are integers; and R represents an alkyl group or an aryl group.
The inorganic SOG film contains water and hydroxyl groups in large amounts and is brittle compared with a silicon oxide film formed by the CVD method. An SOG film having a film thickness of, for example, 0.5 &mgr;m or more readily cracks during thermal treatment.
Since the organic SOG film has a molecular structure containing a moiety terminated by an alkyl group or an aryl group, cracking which is liable to occur during thermal treatment can be controlled, so that the film thickness of the organic SOG film can be increased to about 0.5 to 1 &mgr;m. Accordingly, if an organic SOG film is used, not only can a thick interlayer insulating film be formed, but steps present on the substrate can fully be compensated for to give a planarized surface.
When an SOG film is employed as an interlayer insulating film, and if the insulating property and mechanical strength of the SOG film are important, an insulating film having high insulating property and high mechanical strength in addition to the property of blocking water and hydroxyl groups on or under the SOG film is usually used. However, even in such cases, as long as an SOG film containing water and hydroxyl groups is employed, the apprehension that such water and hydroxyl groups will have an adverse effect on various devices on the semiconductor substrate cannot be eliminated.
When a three-layer structure interlayer insulating film consisting of a silicon oxide film/SOG film/silicon oxide film is formed on an MOS (Metal Oxide Semiconductor) transistor, it has been confirmed by laboratory tests that water and hydroxyl groups contained in the SOG film adversely shorten the life of the MOS transistor even if the silicon oxide films are present.
Further, when an organic SOG film is employed as the interlayer insulating film and tungsten plugs are formed therein by the blanket-tungsten CVD method, formation of voids and cracking or film separation occurs, which leads to incompletely formed tungsten plugs in the contact holes.
FIG. 29
shows a microscopic photograph of the cross section of such a tungsten plug formed in a contact hole observed cross sectionally by a SEM (Scanning Electron Microscope).
This photograph shows that the tungsten in the contact hole is incompletedly formed. This is surmised to be caused by H
2
O and CH
3
dissociated from the organic SOG film, which prevent the reactive gas for forming tungsten such as WF
6
from entering the contact holes sufficiently. It is another factor that recesses (see
FIGS. 25 and 26
) are formed on the plug in the contact hole. Recesses are formed by shrinkage of the organic SOG film when the organic components are removed from the organic SOG film.
Further, the organic SOG film also contains some water and hydroxyl groups, although small compared with the case of the inorganic SOG film. Such water and hydroxyl groups are likely to induce deterioration of electrical properties, corrosion and the like in the tungsten plugs.
SUMMARY OF THE INVENTION
The present invention relates to a semiconductor device and a process for producing the same, and it is an objective of the invention to prevent deterioration of device characteristics and obtain excellent flatness to be achieved by the organic insulating film.
In order to attain the intended objective described above, the semiconductor device according to the present invention has two conducting layers that are spaced from each other. An organic insulating film is electrically insulating these two conducting layers from each other. The organic insulating film contains a contact hole. A plug, which electrically connects these two conducting layers to each other, is embedded in the contact hole. The organic insulating film contains an impurity.
The semiconductor device is fabricated according to the following process. First, an organic insulating film is formed on a lower conducting layer. An impurity having a kinetic energy is introduced into the organic insulating film. Next, a contact hole is formed in the organic insulating film. A plug is formed in the contact hole. An upper conducting layer is formed on the organic insulating film so as to be electrically connected to the plug.
REFERENCES:
patent: 4962052 (1990-10-01), Asayama
Aoe Hiroyuki
Hirase Masaki
Misawa Kaori
Mizuhara Hideki
Watanabe Hiroyuki
Nelms David
Nhu David
Sanyo Electric Co,. Ltd.
Sheridan & Ross P.C.
LandOfFree
Process for producing semiconductor devices including an... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Process for producing semiconductor devices including an..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for producing semiconductor devices including an... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2558249