Process for producing multilayer wiring boards

Details Process for producing multilayer wiring boards Process for producing multilayer wiring boards

1997-02-27

2000-01-04

Bowers, Charles

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438624, 438629, 438638, 438637, 438690, H01L 214763

Patent

active

060109564

ABSTRACT:
An improved process for producing a multilayer wiring board that has a plurality of conductor patterns and an interlevel dielectric layer on at least one surface of a substrate, with via holes or trench-like channels being provided at specified sites of said interlevel dielectric layer to establish an electrical interconnection between said conductor patterns, wherein prior to the provision of said via holes or trench-like channels, a coating having resistance to sandblasting is formed in a pattern over the interlevel dielectric layer and then sandblasting is performed to remove the interlevel dielectric layer in selected areas to form the via holes or trench-like channels and, thereafter, the coating having resistance to sandblasting is removed, followed by the provision of a conductive layer.

REFERENCES:
patent: 4347306 (1982-08-01), Takeda et al.
patent: 5485038 (1996-01-01), Licari et al.
patent: 5698470 (1997-12-01), Yamaguchi
Takezo et al., Patent Abstracts of Japan, vol. 4, No. 156 (P-034) Oct. 31, 1980 JP55-103354.

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