Process for producing electrical circuits with precision surface

Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step

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Details

156634, 156645, 156656, 1566591, 156902, B44C 122, C23F 100

Patent

active

052845486

ABSTRACT:
A process for producing fine pitch surface features on a multilayer printed circuit boards such as copper-polyimide interconnects without requiring a thick copper plating foil. Initially, a thin first conductor (less than 1 micron) is vacuum deposited on a dielectric base and the dielectric base is disposed on a substrate. The substrate is then laminated and through-holes are formed therethrough. A plating seed is deposited in the through-holes and resist is patterned on the first conductor. A second conductor is deposited on the exposed portions of the first conductor and on the sidewalls, the resist is stripped and the portions or the first conductor beneath the resist are removed using a brief wet chemical etch to form spaced features without significant undercut. In the preferred embodiment, vacuum deposition occurs in a continuous roll sputtering system.

REFERENCES:
patent: 4735676 (1988-04-01), Iwasa
patent: 5158645 (1992-10-01), Covert et al.
patent: 5196087 (1993-03-01), Kerns

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