Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step
Patent
1993-12-28
1994-12-20
Hearn, Brian E.
Adhesive bonding and miscellaneous chemical manufacture
Delaminating processes adapted for specified product
Delaminating in preparation for post processing recycling step
437 61, 437228, 437225, 437974, 148DIG12, 148DIG135, 156633, 156643, B44C 122
Patent
active
053743296
ABSTRACT:
According to the present invention, there is provided semiconductor wafer, comprises a plurality of non-porous monocrystal layers laminated with interposition of an insulating layer or insulating layers on a substrate.
REFERENCES:
patent: 3954523 (1976-05-01), Magdo et al.
patent: 3997381 (1976-12-01), Wanlass
patent: 4380865 (1983-04-01), Frye et al.
patent: 4459181 (1984-07-01), Benjamin
patent: 4532700 (1985-08-01), Kinney et al.
patent: 4800527 (1989-01-01), Ozaki et al.
patent: 4868140 (1989-09-01), Yonehara
patent: 4968628 (1990-11-01), Delgado et al.
patent: 5010033 (1991-04-01), Tokunaga et al.
patent: 5234535 (1993-08-01), Beyer et al.
patent: 5250460 (1993-10-01), Yamagata et al.
patent: 5258322 (1993-11-01), Sakaguchi et al.
L. Vescan et al., "Low-Pressure Vapor-Phase Epitaxy Silicon on Porous Silicon," Materials Letters, vol.7, No. 3, Sep. 1988, pp. 94-98.
Takai, et al. "Porous Silicon Layers And Its Oxide For The Silicon Insulator Structure", J. App. Phys., vol. 60(1), 1 Jul. 1986, pp. 222, 225.
"Crystalline Quality of Silicon Layer Formed by Fipos Technology," K. Imai et al., Journal of Crystal Growth, vol. 63, No. 3, Oct. 11, 1993, pp. 547-553.
"Electrolytic Shaping of Germanium and Silicon," A. Uhlir, Jr., The Bell System Technical Journal, Mar. 1956, pp. 333-347.
"Formation Mechanism of Porous Silicon Layer by Anodizatioin in HF Solution," T. Unagami, Journal of the Electrochemical Society, vol. 127, Feb., 1980, pp. 476-483.
"A New Dielectric Isolation Method Using Porous Silicon," K. Imai, Solid State Electronics, vol. 24, 1981, pp. 159-164.
Canon Kabushiki Kaisha
Hearn Brian E.
Nguyen Tuan
LandOfFree
Process for producing a semiconductor wafer does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Process for producing a semiconductor wafer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for producing a semiconductor wafer will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2384777