Process for preventing the formation of a copper precipitate...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S688000

Reexamination Certificate

active

06376375

ABSTRACT:

TECHNICAL FIELD
The present invention relates to semiconductor wafer fabrication and, more particularly, to a process for preventing the formation of a copper precipitate in a copper-containing metallization on a wafer or die.
BACKGROUND OF THE INVENTION
In the modern electronics industry, microelectronic devices are commonly mass-produced as integrated circuits (ICs) which are fabricated and processed on silicon wafers. A given silicon wafer, for example, may be from 4 to 12 inches in diameter and have an array of as many as several hundred separate device locations, commonly referred to as die locations. Each location will ultimately contain an individual microelectronic device once fabrication and processing of the wafer is completed. Once the individual microelectronic devices are fabricated and processed to completion on the wafer, the wafer is then ultimately rendered into separate individual sections commonly referred to as “die,” “microchips,” or “chips.” Each microchip corresponds to a particular device location on the previously unseparated wafer. In accordance with conventional terminology in the field, the term “die” is used as a singular and plural form, that is, referring to one unit on a wafer or multiple units on a wafer. (See “Microchip Fabrication” 3
rd
Edition, by Peter Van Zant, published by McGraw-Hill, 1997, page 592.)
Once the active and passive components of the individual microelectronic devices on the wafers are initially formed, process steps are carried out which deposit, via sputtering techniques, one or more patterned layers of conducting metal such as, for example, metal interconnect lines on the wafer so that the device components on each individual die can be electrically connected. During these same process steps, metal bond pads are formed and thereby situated on, typically, the perimeter of the die as well. In general, the materials and process steps which form such conducting metal and metal bond pads are referred to herein as “metallization.”
After metallization, a passivation layer, commonly comprising silicon dioxide, is formed over every die on a given wafer. This passivation layer is intended to protect the microelectronic devices contained on the wafer die during post-fabrication testing, packaging processes, and ultimate consumer use. The passivation layer, however, is carefully and selectively patterned to leave the metal bond pads exposed, and not covered by passivation on each die, so that these metal bond pads can be electrically accessed later on in the manufacturing process, for example, during packaging.
After the passivation layer is formed and patterned on a given wafer, the wafer is then ultimately physically separated into individual microchips or die. Once separated from each other, each individual microchip is then typically mounted within its own separate package having external leads. Once each die is mounted within a package, the metal bond pads on the packaged die are wirebonded to internal leads within the package which electrically correspond to the external leads of the package. Thereafter, the die is sealed in the package.
An aluminum/copper/silicon (hereinafter “Al/Cu/Si”) alloy is typically the material of choice for metal interconnect lines and metal bond pads and is currently used throughout the semiconductor and microelectronics industry. Other copper-containing materials are useful as hereinafter explained. Such an Al/Cu/Si alloy offers many material properties which are particularly advantageous for the increasingly small geometries prevalent in the microelectronics industry today. Some of the advantages resulting from such material properties include improved metal step coverage, resistance to electrornigration, and a decrease in metal surface defects such as, for example, hillocks. While such material properties are beneficial, and for some microelectronic devices critical for initial quality and product longevity, there are certain process control problems regarding the metal reactivity of the Al/Cu/Si alloy which occur during both fabrication and post-fabrication phases of the overall microelectronic manufacturing process. In particular, premature erosion and/or corrosion of the Al/Cu/Si metallization due to its reactivity is a common problem in the microelectronics industry. Although various manufacturers have made various attempts to pinpoint and solve the problem, no completely satisfying solution has yet been found.
Metal reactivity and subsequent corrosion of device metallizations are of great concern to manufacturers in the semiconductor microelectronics industry. The analysis labs of such manufacturers commonly have a steady stream of failed devices being submitted for elemental analysis to determine if corrosion played a part in the failures of the devices. Furthermore, “seasonal corrosion” often can wipe out entire device inventory lines in post-fabrication and/or downstream manufacturing areas, such as, for example, in wafer/die test areas, in wafer dicing or sawing areas, and/or in wirebond/packaging facilities. Thus, reducing metal reactivity is and has always been a high priority for manufacturers in both the fabrication and post-fabrication manufacturing areas.
As a first proposed remedy for reducing and/or eliminating the reactivity of bulk Al/Cu/Si solutions, manufacturers have tried anodizing the surface of the exposed metal bond pads of the devices. Manufacturers accomplished this by increasing the thickness of the native surface oxide through various oxygen rich and low temperature bakes. As a result, increasing the native oxide thickness effectively reduces the effect of mild forms of corrosion and erosion such as the pitting corrosion/mottling exhibited on metal bond pads exposed to deionized (DI) water rinses. However, such an increase in the native oxide thickness does not prevent corrosion resulting from the more aggressive attack of ionic contaminants such as fluorine or chlorine. The cathodic potential between copper and aluminum is 0.047 v/wt %, thus making the metal bond pad surface highly reactive. Thus, when ionic contaminants, or even a gold ball bond on a metal bond pad of a microchip during the microchip packaging (wirebond) process, are introduced to the Al/Cu/Si solution, the surface reactivity can undesirably increase almost exponentially.
As a second proposed remedy for reducing and/or eliminating the reactivity of bulk Al/Cu/Si solutions, other manufacturers have tried to limit the exposure of the Al/Cu/Si metallization solution to various corrosion and/or erosion accelerants. Such is accomplished by maintaining a high level of cleanliness within both the fabrication and post-fabrication manufacturing areas and/or by protecting the exposed metallization with various compounds, such as gels or encapsulants. However, while increasing the cleanliness of, for example, the microchip packaging and assembly area is desirable, it is not necessarily a feasible solution for all packaging areas. The reason for this is because many production areas are considered to be “open” manufacturing facilities and, therefore, have no separation from the surrounding, marginally-clean factory environment. As a practical matter, microchips or die with exposed metal bond pad metallization, or any other similar metallization, continue to be susceptible to corrosion resulting from an unclean environment.
As a third proposed remedy for reducing and/or eliminating the reactivity of bulk Al/Cu/Si solutions, some manufacturers have eliminated copper from their device metallizations altogether. However, while some microelectronic devices can function properly throughout their lifetime without the addition of copper, other devices need it for their long-term reliability. More particularly, copper additives are utilized throughout the semiconductor microelectronics industry to increase metal step coverage on increasingly small metal line widths and geometries commonly found in devices today. Furthermore, other high current density devices incorporate copper to prevent metal electromigration and th

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