Process for preparing a heterojunction bipolar transistor

Details Process for preparing a heterojunction bipolar transistor Process for preparing a heterojunction bipolar transistor

1995-05-23

1996-12-24

Fourson, George

Fishing, trapping, and vermin destroying

437 99, 437126, 437131, 437228, 437 33, 148DIG11, 148DIG72, 148DIG117, 257197, 257592, H01L 21265

Patent

active

055873278

ABSTRACT:
A process for preparing a bipolar transistor for very high frequencies is described, which is especially advantageous for the preparation of heterobipolar transistors and leads to components with low parasitic capacities and low base lead resistance. The process includes forming a structured first layer with collector zone and insulation areas surrounding the collector zone on a monocrystalline lead layer. A series of monocrystalline transistor layers are grown on the first layer over the collector zone by differential epitaxy and a series of polycrystalline layers is grown at the same time over the insulation areas. A series of polycrystalline layers is designed as a base lead.

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