Process for physical isolation of regions of a substrate board

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation

Reexamination Certificate

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C438S458000, C438S424000, C438S296000

Reexamination Certificate

active

06303462

ABSTRACT:

TECHNICAL DOMAIN
This invention relates to a process for preparation of a substrate board, and more precisely for the physical isolation of regions of a substrate board.
For the purposes of the invention, physical isolation of regions means a separation between the various regions to electrically and/or optically and/or magnetically and/or mechanically (particularly piezoelectrically) isolate the said regions.
The invention may be used in a very wide variety of applications in industry, depending on the isolation type planned.
For example, a semiconductor substrate board with electrically isolated regions may be used to make electronic components, and particularly power switching components.
In the same way, a substrate board comprising regions of transparent of double refraction material may be used for making wave guides, lenses or optical switches. Similarly, a substrate board comprising regions of piezoelectric or electro-optic materials may be used to make sensor or actuator matrices.
The invention may also be used in the mechanical or magnetic domain for integration of various sensors such as pressure, acceleration and magnetic field sensors, or other sensors.
STATE OF PRIOR ART
The manufacture of equipment in the integrated power electronics domain makes less and less use of discrete components formed throughout the thickness of a substrate board. Integration techniques specific to microelectronics are preferred, in which components and connections between components are formed on the surface of the substrate. These techniques are usually denoted by the term “Smart Power”.
Special measures taken to provide sufficient electrical isolation between components makes modifications necessary to the form of components, and frequently complex preparations of integration supports.
Furthermore, isolation constraints are frequently contrary to the requirements of an increasingly dense integration.
Isolation of more traditional electronic components formed throughout the thickness of the support substrate also involves complex substrate preparation operations. For example, these operations include the diffusion of doping impurities in selected regions of the substrate to form potential barriers in it. They may also include the formation of dielectric barriers before components are made.
Component isolation problems also arise for optical circuits in which it is necessary to avoid any diffusion or propagation of parasite light between the various components.
Finally, complex magnetic or mechanical isolation precautions must be taken for the manufacture of magnetic or mechanical sensors or transducers.
The difficulties mentioned above are even worse when different categories of components are to be integrated on the same substrate board, if the components have different isolation requirements. For example, this is the case when microelectronics circuits and power electronics circuits, electronic circuits and optical circuits, or sensors, have to be combined with each other.
DESCRIPTION OF THE INVENTION
The purpose of this invention is to propose a process for physical isolation of regions with a substrate board without the difficulties mentioned above.
One purpose in particular is to propose this type of process for making an electrical, optical, mechanical and/or magnetic isolation according to the manufacturing requirements of the circuits considered.
Another purpose is to propose such a process particularly suitable for electronic power circuits capable of providing insulation at high voltages.
Another purpose is to propose an isolation system which is easy to use, which can be implemented during or after the placement of components in or on regions of the substrate board, and which is compatible with the constraints of large scale component integration.
In order to achieve these purposes, the purpose of the invention is more specifically a process for physical isolation of regions of a substrate board comprising the following steps:
a) bonding of the substrate onto a support using an adhesive means that can be subsequently unbonded,
b) formation of trenches delimiting regions of the substrate, in the substrate,
c) placement of a liquid bonding material in the trenches, which can solidify and bond to the substrate board when in the solid state,
d) solidification of the bonding material.
The choice of the bonding material may be adapted as a function of the required isolation type. In particular, for example, a dielectric material such as a polymer, a sol-gel or an epoxy may be selected to provide electrical insulation.
The trenches may be, but are not necessarily, through trenches. They are preferably formed by sawing, but may also be chemically etched or obtained by a combination of sawing and etching operations. The trenches may also be formed using other techniques such as laser cutting or water jet cutting techniques.
The support used in step a) efficiently maintains the cohesion of regions of the substrate board until the placement and solidification of the bonding material.
According to one particular embodiment of the invention, particularly applicable to insulation of electrical voltages between different regions of the substrate, flares may be formed on the surface of the substrate board to coincide with the trenches.
In particular, grooves with oblique sides forming the said flares may be formed in the substrate board.
The flares may be formed before or after the trenches, obviously provided that the end of the trenches coincides with the flares.
The flares may be formed at one or both ends of the trenches. They are formed at both ends particularly when electrical voltages between adjacent regions of the substrate could be reversed.
The flares at the two ends of the trenches may be made using the following operational steps, in sequence:
form first grooves with flared sides on a first face of the substrate board,
form first non-through trenches in the board starting from the first face, coinciding with the first grooves,
apply a coat of bonding material on the first trenches,
separate the substrate and the support,
form second grooves with flared edges on the second face of the substrate board, opposite the said first face, the two grooves being collinear with the first grooves,
form second trenches leading into the first trenches from the second face, coinciding with the second grooves,
apply a coat of bonding material on the second grooves.
Applying a coat of bonding material means placement and solidification of the bonding material.
In order to adapt the isolation to the type of components being made in the various regions of the substrate board, the surface of the trenches can be lined with a suitable coating before placing the bonding material.
For example, for a better distribution of the electric field, the trench sides could be coated with a thin coat of material with a given electrical conductivity.
In one use of the substrate to make optical components, the sides may be lined with a metal coat forming a mirror, or a dielectric multi-layer structure forming an optical anti-reflection coating.
The invention also relates to the use of a substrate board according to the process described above for the manufacture of strips or matrices of diodes or transistors insulated from each other, or for the manufacture of strips or matrices of electronic circuits electrically insulated from each other, or for the manufacture of a component made of diodes and/or transistors and/or electronic circuits and/or sensors or actuators isolated from each other.
Other characteristics and advantages of the invention will become more obvious from the following description with reference to the figures in the attached drawings. This description is given for illustrative purposes only and is in no way restrictive.


REFERENCES:
patent: 3756872 (1973-09-01), Goodman
patent: 3924323 (1975-12-01), Trevail et al.
patent: 4612408 (1986-09-01), Moddel et al.
patent: 5064771 (1991-11-01), Solomon
Loren A. Chow, et al., Mat. Res. Soc. Symp. Proc., vol. 476, pp. 105-110, “The Processing and Chara

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