Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Reexamination Certificate
2011-01-18
2011-01-18
Landau, Matthew C (Department: 2813)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
C438S053000, C257SE21564, C257SE21573
Reexamination Certificate
active
07871894
ABSTRACT:
A process for manufacturing a suspended structure of semiconductor material envisages the steps of: providing a monolithic body of semiconductor material having a front face; forming a buried cavity within the monolithic body, extending at a distance from the front face and delimiting, with the front face, a surface region of the monolithic body, said surface region having a first thickness; carrying out a thickening thermal treatment such as to cause a migration of semiconductor material of the monolithic body towards the surface region and thus form a suspended structure above the buried cavity, the suspended structure having a second thickness greater than the first thickness. The thickening thermal treatment is an annealing treatment.
REFERENCES:
patent: 6208007 (2001-03-01), Babic et al.
patent: 6518147 (2003-02-01), Villa et al.
patent: 6787052 (2004-09-01), Vaganov
patent: 6790751 (2004-09-01), Tsuruta et al.
patent: 6833079 (2004-12-01), Giordani
patent: 6870445 (2005-03-01), Kawakubo et al.
patent: 7164188 (2007-01-01), Farrar et al.
patent: 7354786 (2008-04-01), Benzel et al.
patent: 7537989 (2009-05-01), Nakai et al.
patent: 2003/0111665 (2003-06-01), Geusic et al.
patent: 2003/0168711 (2003-09-01), Villa et al.
patent: 2003/0181018 (2003-09-01), Geusic et al.
patent: 2004/0129998 (2004-07-01), Inoh et al.
patent: 2004/0227207 (2004-11-01), Barlocchi et al.
patent: 2004/0251781 (2004-12-01), Bouche et al.
patent: 2005/0067294 (2005-03-01), Choe et al.
patent: 2005/0172717 (2005-08-01), Wu et al.
patent: 2007/0020876 (2007-01-01), Blomiley et al.
patent: 1577656 (2005-09-01), None
Sato T et al., “Fabrication of Silicon-on-Nothing Structure by Substrate Engineering Using the Empty-Space-in-Silicon Formation Technique”, Japanese Journal of Applied Physics, Japan Society of Applied Physics, Tokyo, JP, vol. 43, No. 1, Jan. 2004, pp. 12-18, XP001191452.
European Search Report for EP 05 42 5676 dated Jan. 11, 2006.
Barlocchi Gabriele
Corona Pietro
Villa Flavio Francesco
Crawford Latanya
Graybeal Jackson LLP
Jablonski Kevin D.
Jorgenson Lisa K.
Landau Matthew C
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