Process for manufacturing semiconductor integrated circuit devic

Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

430330, 430328, 216 41, 216 67, 438713, G03F 726

Patent

active

060570814

ABSTRACT:
In order that reaction products of low vapor pressure may be prevented from being deposited on the side wall of a predetermined pattern when this pattern is to be formed by dry-etching a Pt film or a PZT film, a resist mask 54 having a rounded outer periphery at its head is used when the Pt film 53 deposited on a semiconductor substrate 50 is to be dry-etched. After this dry-etching, moreover, an overetching of a proper extent is performed to completely remove the side wall deposited film 55 which is left on the side of the pattern. The resist mask 54 is formed by exposing and developing a benzophenone novolak resist and subsequently by heating to set it while irradiating it, if necessary, with ultraviolet rays.

REFERENCES:
patent: 4678540 (1987-07-01), Uchimura
patent: 4705597 (1987-11-01), Gimpleson et al.
patent: 4838992 (1989-06-01), Abraham
patent: 5174857 (1992-12-01), Sung
patent: 5258093 (1993-11-01), Maniar
patent: 5453347 (1995-09-01), Bullington et al.
patent: 5509995 (1996-04-01), Park
patent: 5515984 (1996-05-01), Yokoyama et al.
patent: 5516626 (1996-05-01), Ohmi et al.
patent: 5651856 (1997-07-01), Keller et al.
patent: 5685950 (1997-11-01), Sato
patent: 5686363 (1997-11-01), Tabara
patent: 5691111 (1997-11-01), Iwasa et al.
patent: 5695906 (1997-12-01), Nishi et al.
patent: 5700607 (1997-12-01), Rath et al.
patent: 5726102 (1998-03-01), Lo
patent: 5753418 (1998-05-01), Tsai et al.
patent: 5756262 (1998-05-01), Endo et al.
patent: 5789323 (1998-08-01), Taylor
patent: 5795832 (1998-08-01), Kumihashi et al.
patent: 5805273 (1998-09-01), Unno
patent: 5840200 (1998-11-01), Nakagawa et al.
27p-N-9, Preprint No. 2 of the 43rd Joint Congress of Applied Physics of Japan 1996. "Pt/PZT/pt Capacitor Fabrication Using Self-Cleaning Dry Etching", by T. Kumihashi, et al.
26a-ZT-4, Preprint No. 2 of 56th Joint Congress of Applied Physics of Japan 1995. Dry Etching of Platinum with Ar/O.sub.2 Gas Plasma by M. Matsushita, et al.
"Glow Discharge Processes Sputtering and Plasma Etching", by Brian Chapman, pp/244-253.
Yunogami, et al., "Sub-Quarter-Micron Pt Etching Technology Using Electron Beam Resist with Round-Head", (Received Jul. 14, 1998).
Yunogami, et al., "Sidewall-Fence-Free Pt Etching Using Round Head Resist Mask by Magnetron-RIE", in 1997 Dry Process Symposium, pp. 211-216.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Process for manufacturing semiconductor integrated circuit devic does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for manufacturing semiconductor integrated circuit devic, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for manufacturing semiconductor integrated circuit devic will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1592608

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.