Process for manufacturing plastic pin grid arrays and the produc

Details Process for manufacturing plastic pin grid arrays and the produc Process for manufacturing plastic pin grid arrays and the produc

1990-08-02

1992-09-01

James, Andrew J.

Electricity: electrical systems and devices

Safety and protection of systems and devices

With specific current responsive fault sensor

357 72, 357 81, 361387, 361400, H01L 2302, H01L 2328, H02B 100, H05K 702

Patent

active

051444127

ABSTRACT:
A pin grid array package is provided. An array of terminal pins pass through apertures formed in an interconnect tape. The terminal pins are electrically connected to circuit traces formed on interconnect tape. The electrically conductive bond between the terminal pins and circuit traces is either by a mechanical cinch by soldering. In one embodiment, at least a portion of the interconnect tape, terminal pins and a heat sink are embedded in a molding polymer resin.

REFERENCES:
patent: Re32540 (1987-11-01), Murphy
patent: 4124864 (1978-11-01), Greenberg
patent: 4338621 (1982-07-01), Braun
patent: 4340902 (1982-07-01), Honda et al.
patent: 4398208 (1983-08-01), Murano et al.
patent: 4514752 (1985-04-01), Engel et al.
patent: 4521469 (1985-06-01), Butt et al.
patent: 4525422 (1985-06-01), Butt et al.
patent: 4549651 (1985-10-01), Alemanni
patent: 4552422 (1985-11-01), Bennett et al.
patent: 4593342 (1986-06-01), Lindsey
patent: 4618739 (1986-10-01), Theobald
patent: 4626958 (1986-12-01), Lockard et al.
patent: 4677526 (1987-06-01), Meuhling
patent: 4688152 (1987-08-01), Chia
patent: 4696526 (1987-09-01), Newton et al.
patent: 4698663 (1987-10-01), Sugimoto et al.
patent: 4706811 (1987-11-01), Jung et al.
patent: 4709401 (1987-11-01), Yamaguti
patent: 4711023 (1987-12-01), Marchisi et al.
patent: 4711688 (1987-12-01), Pienimaa
patent: 4712127 (1987-12-01), Colombo et al.
patent: 4725692 (1988-02-01), Ishii et al.
patent: 4729010 (1988-03-01), Tsuchiya et al.
patent: 4750030 (1988-06-01), Hatakeyama
patent: 4750092 (1988-06-01), Werther
patent: 4769344 (1988-09-01), Sakai et al.
patent: 4789011 (1988-12-01), Moloney
patent: 4823234 (1989-04-01), Konishi et al.
patent: 4868638 (1989-09-01), Hirata et al.
patent: 4890152 (1989-12-01), Hirata et al.
Semiconductor Package Update, vol. II, No. 1, Jan. 1987 at p. 10.
Tsutsumi et al, Composite Type Pin Grid Array Package, appearing in 1986 IEEE at pp. 560-563.
Lyman, How To Make Pin-Grid Arrays At Half The Cost, Electronics, Feb. 19, 1987 at p. 36.

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