Process for manufacturing buried channels and cavities in...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate

Reexamination Certificate

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C438S300000

Reexamination Certificate

active

06376291

ABSTRACT:

TECHNICAL FIELD
The present invention regards a process for manufacturing buried channels and cavities in semiconductor material wafers.
BACKGROUND OF THE INVENTION
As known, present applications require channels or cavities inside a silicon substrate, for example for making suspended masses of microactuators and/or sensors of various kinds, such as speed, acceleration, and pressure sensors, or for insulating electronic components.
At present, buried cavities can be made basically in two ways. According to a first solution, shown in
FIG. 1
, two monocrystalline silicon wafers
1
, appropriately excavated so as each of them presents a half-cavity, are bonded together using an adhesive layer (for example, silicon oxide
2
) so that the two half-cavities form a buried cavity
3
.
According to a second solution, shown in
FIG. 2
, a wafer
1
of monocrystalline silicon, appropriately excavated so as to present final cavities
4
, is bonded to a glass layer
5
(anodic bonding process).
Such solutions are costly, highly critical, have low productivity, and are not completely compatible with the usual technological phases involved in the manufacture of microelectronic components. In addition, in the solution of
FIG. 2
, it is not always possible to make also an integrated circuit.
SUMMARY OF THE INVENTION
The embodiments of the present invention provide a process that eliminates the disadvantages of the known solutions.
According to an embodiment of the present invention, a process for manufacturing buried cavities in semiconductor material wafers and a semiconductor material wafer are provided. The process includes forming a nucleus region in a monocrystalline body surrounded by a protective structure, forming a cavity beneath the nucleus region, removing at least a top portion of the protective structure, and growing an epitaxial layer on the body and over the nucleus region.


REFERENCES:
patent: 4685198 (1987-08-01), Kawakita et al.
patent: 4771638 (1988-09-01), Sugiyama et al.
patent: 4993143 (1991-02-01), Sidner et al.
patent: 5932396 (1999-08-01), Kamijima
patent: 0 890 998 (1999-01-01), None
Tabata, O. et al., “Anisotropic Etching of Silicon in (CH3)4NOH Solutions,”IEEE, pp. 811-814, 1991.

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