Process for manufacturing a wiring substrate

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S670000, C438S677000, C438S678000, C438S687000

Reexamination Certificate

active

10989515

ABSTRACT:
A process for manufacturing a wiring substrate, comprising: a step of forming an insulating resin layer containing an inorganic filler over a wiring layer formed on at least one surface of an insulating substrate; a step of forming a thin copper film layer by roughening a surface of the insulating resin layer and plating the same electrolessly with copper; a step of forming an insulating film over the thin copper film layer; a step of forming plated resists profiling a pattern by exposing and developing the insulating film with the pattern; and a step of forming wiring pattern layers by an electrolytic copper plating on a surface of the insulating resin layer having the plated resists formed thereon, wherein at least one of the plated resists has a width of less than 20 μm, and the plated resists include adjoining plated resists in which a clearance between said adjoining plated resists has a width of less than 20 μm.

REFERENCES:
patent: 6693029 (2004-02-01), Iijima et al.
patent: 6759318 (2004-07-01), Chang
patent: 6855626 (2005-02-01), Sato et al.
patent: 2003-133725 (2003-05-01), None

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